revert: longlong.h (count_leading_zeros): Replace '{' and '}' with '%{' and '%}', respectively.
Revert:
2007-10-09 Kazu Hirata <kazu@codesourcery.com>
* longlong.h (count_leading_zeros): Replace '{' and '}' with '%{'
and '%}', respectively.
Revert:
2007-10-09 Kazu Hirata <kazu@codesourcery.com>
* config/m68k/m68k.c (print_operand): Handle '{' and '}'.
* config/m68k/m68k.h (PRINT_OPERAND_PUNCT_VALID_P): Accept '{'
and '}'.
* config/m68k/m68k.md: Replace '{' with '%{' where '{' is
meant to be output.
Revert:
2007-10-07 Kazu Hirata <kazu@codesourcery.com>
* config/m68k/m68k.c, config/m68k/m68k.md: Use the assembly
syntax for ASSEMBLER_DIALECT.
* config/m68k/m68k.h (ASSEMBLER_DIALECT): New.
From-SVN: r129202
This commit is contained in:
Kazu Hirata
Kazu Hirata
parent
05223046d5
commit
4b3d1177d8
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@ -1,3 +1,24 @@
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2007-10-10 Kazu Hirata <kazu@codesourcery.com>
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Revert:
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2007-10-09 Kazu Hirata <kazu@codesourcery.com>
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* longlong.h (count_leading_zeros): Replace '{' and '}' with '%{'
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and '%}', respectively.
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Revert:
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2007-10-09 Kazu Hirata <kazu@codesourcery.com>
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* config/m68k/m68k.c (print_operand): Handle '{' and '}'.
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* config/m68k/m68k.h (PRINT_OPERAND_PUNCT_VALID_P): Accept '{'
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and '}'.
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* config/m68k/m68k.md: Replace '{' with '%{' where '{' is
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meant to be output.
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Revert:
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2007-10-07 Kazu Hirata <kazu@codesourcery.com>
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* config/m68k/m68k.c, config/m68k/m68k.md: Use the assembly
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syntax for ASSEMBLER_DIALECT.
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* config/m68k/m68k.h (ASSEMBLER_DIALECT): New.
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2007-10-10 Revital Eres <eres@il.ibm.com>
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* modulo-sched.c (check_nodes_order): Dump the final order of
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@ -3375,8 +3375,8 @@ output_addsi3 (rtx *operands)
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&& (INTVAL (operands[2]) < -32768 || INTVAL (operands[2]) > 32767))
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return "move%.l %2,%0\n\tadd%.l %1,%0";
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if (GET_CODE (operands[2]) == REG)
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return "lea {(%1,%2.l)|%1@(0,%2:l)},%0";
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return "lea {(%c2,%1)|%1@(%c2)},%0";
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return MOTOROLA ? "lea (%1,%2.l),%0" : "lea %1@(0,%2:l),%0";
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return MOTOROLA ? "lea (%c2,%1),%0" : "lea %1@(%c2),%0";
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}
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if (GET_CODE (operands[2]) == CONST_INT)
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{
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@ -3414,7 +3414,7 @@ output_addsi3 (rtx *operands)
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if (TUNE_68040)
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return "add%.w %2,%0";
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else
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return "lea {(%c2,%0)|%0@(%c2)},%0";
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return MOTOROLA ? "lea (%c2,%0),%0" : "lea %0@(%c2),%0";
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}
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}
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return "add%.l %2,%0";
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@ -3710,8 +3710,6 @@ floating_exact_log2 (rtx x)
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'&' for the letter `d' in an op code, but only on the 68040.
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'/' for register prefix needed by longlong.h.
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'?' for m68k_library_id_string
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'{' for '{'
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'}' for '}'
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'b' for byte insn (no effect, on the Sun; this is for the ISI).
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'd' to force memory addressing to be absolute, not relative.
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@ -3729,18 +3727,14 @@ print_operand (FILE *file, rtx op, int letter)
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if (MOTOROLA)
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fprintf (file, ".");
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}
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else if (letter == '{')
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fprintf (file, "{");
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else if (letter == '}')
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fprintf (file, "}");
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else if (letter == '#')
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asm_fprintf (file, "%I");
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else if (letter == '-')
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asm_fprintf (file, "{-(%Rsp)|%Rsp@-}");
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asm_fprintf (file, MOTOROLA ? "-(%Rsp)" : "%Rsp@-");
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else if (letter == '+')
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asm_fprintf (file, "{(%Rsp)+|%Rsp@+}");
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asm_fprintf (file, MOTOROLA ? "(%Rsp)+" : "%Rsp@+");
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else if (letter == '@')
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asm_fprintf (file, "{(%Rsp)|%Rsp@}");
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asm_fprintf (file, MOTOROLA ? "(%Rsp)" : "%Rsp@");
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else if (letter == '!')
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asm_fprintf (file, "%Rfpcr");
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else if (letter == '$')
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@ -3780,7 +3774,7 @@ print_operand (FILE *file, rtx op, int letter)
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&& !(GET_CODE (XEXP (op, 0)) == CONST_INT
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&& INTVAL (XEXP (op, 0)) < 0x8000
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&& INTVAL (XEXP (op, 0)) >= -0x8000))
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asm_fprintf (file, "{.|:}l");
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fprintf (file, MOTOROLA ? ".l" : ":l");
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}
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else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == SFmode)
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{
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@ -3840,11 +3834,11 @@ print_operand_address (FILE *file, rtx addr)
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gcc_unreachable ();
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if (address.code == PRE_DEC)
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asm_fprintf (file, "{-(%s)|%s@-}",
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M68K_REGNAME (REGNO (address.base)));
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fprintf (file, MOTOROLA ? "-(%s)" : "%s@-",
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M68K_REGNAME (REGNO (address.base)));
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else if (address.code == POST_INC)
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asm_fprintf (file, "{(%s)+|%s@+}",
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M68K_REGNAME (REGNO (address.base)));
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fprintf (file, MOTOROLA ? "(%s)+" : "%s@+",
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M68K_REGNAME (REGNO (address.base)));
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else if (!address.base && !address.index)
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{
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/* A constant address. */
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@ -3853,7 +3847,7 @@ print_operand_address (FILE *file, rtx addr)
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{
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/* (xxx).w or (xxx).l. */
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if (IN_RANGE (INTVAL (addr), -0x8000, 0x7fff))
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asm_fprintf (file, "%d{.|:}w", (int) INTVAL (addr));
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fprintf (file, MOTOROLA ? "%d.w" : "%d:w", (int) INTVAL (addr));
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else
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fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (addr));
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}
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@ -29,10 +29,6 @@ along with GCC; see the file COPYING3. If not see
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# define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)")
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#endif
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/* Options 0 and 1 are the Motorola and MIT syntaxes,
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respectively. */
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#define ASSEMBLER_DIALECT !MOTOROLA
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/* Handle --with-cpu default option from configure script. */
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#define OPTION_DEFAULT_SPECS \
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{ "cpu", "%{!mc68000:%{!m68000:%{!m68302:%{!m68010:%{!mc68020:%{!m68020:\
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@ -975,11 +971,17 @@ do { if (cc_prev_status.flags & CC_IN_68881) \
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#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
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sprintf (LABEL, "*%s%s%ld", LOCAL_LABEL_PREFIX, PREFIX, (long)(NUM))
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#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
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asm_fprintf (FILE, "\tmove%.l %s,{-(%Rsp)|%Rsp@-}\n", reg_names[REGNO])
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#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
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asm_fprintf (FILE, (MOTOROLA \
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? "\tmove.l %s,-(%Rsp)\n" \
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: "\tmovel %s,%Rsp@-\n"), \
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reg_names[REGNO])
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#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
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asm_fprintf (FILE, "\tmove%.l {(%Rsp)+|%Rsp@+},%s\n", reg_names[REGNO])
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#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
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asm_fprintf (FILE, (MOTOROLA \
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? "\tmove.l (%Rsp)+,%s\n" \
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: "\tmovel %Rsp@+,%s\n"), \
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reg_names[REGNO])
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/* The m68k does not use absolute case-vectors, but we must define this macro
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anyway. */
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@ -1057,8 +1059,6 @@ do { if (cc_prev_status.flags & CC_IN_68881) \
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'&' for the letter `d' in an op code, but only on the 68040.
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'/' for register prefix needed by longlong.h.
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'?' for m68k_library_id_string
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'{' for '{'
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'}' for '}'
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'b' for byte insn (no effect, on the Sun; this is for the ISI).
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'd' to force memory addressing to be absolute, not relative.
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@ -1069,8 +1069,7 @@ do { if (cc_prev_status.flags & CC_IN_68881) \
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#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
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((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \
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|| (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \
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|| (CODE) == '$' || (CODE) == '&' || (CODE) == '/' || (CODE) == '?' \
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|| (CODE) == '{' || (CODE) == '}')
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|| (CODE) == '$' || (CODE) == '&' || (CODE) == '/' || (CODE) == '?')
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/* See m68k.c for the m68k specific codes. */
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@ -825,7 +825,7 @@
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"TUNE_68040_60"
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{
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if (which_alternative == 0)
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return "lea 0{.|:}w,%0";
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return MOTOROLA ? "lea 0.w,%0" : "lea 0:w,%0";
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else if (which_alternative == 1)
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return "clr%.l %0";
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else
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@ -1140,7 +1140,7 @@
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{
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/* On the '040, 'subl an,an' takes 2 clocks while lea takes only 1 */
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if (TUNE_68040_60)
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return "lea 0{.|:}w,%0";
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return MOTOROLA ? "lea 0.w,%0" : "lea 0:w,%0";
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else
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return "sub%.l %0,%0";
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}
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@ -2444,13 +2444,13 @@
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return "#";
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case 5:
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return "lea {(%1,%2.l)|%1@(0,%2:l)},%0";
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return MOTOROLA ? "lea (%1,%2.l),%0" : "lea %1@(0,%2:l),%0";
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case 6:
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return "lea {(%2,%1.l)|%2@(0,%1:l)},%0";
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return MOTOROLA ? "lea (%2,%1.l),%0" : "lea %2@(0,%1:l),%0";
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case 7:
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return "lea {(%c2,%1)|%1@(%c2)},%0";
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return MOTOROLA ? "lea (%c2,%1),%0" : "lea %1@(%c2),%0";
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default:
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gcc_unreachable ();
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@ -2521,7 +2521,7 @@
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}
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}
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if (ADDRESS_REG_P (operands[0]) && !TUNE_68040)
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return "lea {(%c2,%0)|%0@(%c2)},%0";
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return MOTOROLA ? "lea (%c2,%0),%0" : "lea %0@(%c2),%0";
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}
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return "add%.w %2,%0";
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})
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@ -2576,7 +2576,7 @@
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}
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}
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if (ADDRESS_REG_P (operands[0]) && !TUNE_68040)
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return "lea {(%c1,%0)|%0@(%c1)},%0";
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return MOTOROLA ? "lea (%c1,%0),%0" : "lea %0@(%c1),%0";
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}
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return "add%.w %1,%0";
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})
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@ -2625,7 +2625,7 @@
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}
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}
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if (ADDRESS_REG_P (operands[0]) && !TUNE_68040)
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return "lea {(%c1,%0)|%0@(%c1)},%0";
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return MOTOROLA ? "lea (%c1,%0),%0" : "lea %0@(%c1),%0";
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}
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return "add%.w %1,%0";
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})
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@ -2971,7 +2971,9 @@
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(mult:HI (match_operand:HI 1 "general_operand" "%0")
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(match_operand:HI 2 "general_src_operand" "dmSn")))]
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""
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"muls{.w} %2,%0"
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{
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return MOTOROLA ? "muls%.w %2,%0" : "muls %2,%0";
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}
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[(set_attr "type" "muls_w")
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(set_attr "opy" "2")])
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@ -2982,7 +2984,9 @@
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(sign_extend:SI
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(match_operand:HI 2 "nonimmediate_src_operand" "dmS"))))]
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""
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"muls{.w} %2,%0"
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{
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return MOTOROLA ? "muls%.w %2,%0" : "muls %2,%0";
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}
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[(set_attr "type" "muls_w")
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(set_attr "opy" "2")])
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@ -2992,7 +2996,9 @@
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(match_operand:HI 1 "nonimmediate_operand" "%0"))
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(match_operand:SI 2 "const_int_operand" "n")))]
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"INTVAL (operands[2]) >= -0x8000 && INTVAL (operands[2]) <= 0x7fff"
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"muls{.w} %2,%0"
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{
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return MOTOROLA ? "muls%.w %2,%0" : "muls %2,%0";
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}
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[(set_attr "type" "muls_w")
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(set_attr "opy" "2")])
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@ -3029,7 +3035,9 @@
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(zero_extend:SI
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(match_operand:HI 2 "nonimmediate_src_operand" "dmS"))))]
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""
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"mulu{.w} %2,%0"
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{
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return MOTOROLA ? "mulu%.w %2,%0" : "mulu %2,%0";
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}
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[(set_attr "type" "mulu_w")
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(set_attr "opy" "2")])
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@ -3039,7 +3047,9 @@
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(match_operand:HI 1 "nonimmediate_operand" "%0"))
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(match_operand:SI 2 "const_int_operand" "n")))]
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"INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 0xffff"
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"mulu{.w} %2,%0"
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{
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return MOTOROLA ? "mulu%.w %2,%0" : "mulu %2,%0";
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}
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[(set_attr "type" "mulu_w")
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(set_attr "opy" "2")])
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@ -3462,7 +3472,10 @@
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(mod:HI (match_dup 1) (match_dup 2)))]
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"!TARGET_COLDFIRE || TARGET_CF_HWDIV"
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{
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output_asm_insn ("ext%.l %0\;divs{.w} %2,%0", operands);
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output_asm_insn (MOTOROLA ?
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"ext%.l %0\;divs%.w %2,%0" :
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"extl %0\;divs %2,%0",
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operands);
|
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if (!find_reg_note(insn, REG_UNUSED, operands[3]))
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{
|
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CC_STATUS_INIT;
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|
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@ -3481,9 +3494,15 @@
|
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"!TARGET_COLDFIRE || TARGET_CF_HWDIV"
|
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{
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if (ISA_HAS_MVS_MVZ)
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output_asm_insn ("mvz%.w %0,%0\;divu{.w} %2,%0", operands);
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output_asm_insn (MOTOROLA ?
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"mvz%.w %0,%0\;divu%.w %2,%0" :
|
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"mvz%.w %0,%0\;divu %2,%0",
|
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operands);
|
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else
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output_asm_insn ("and%.l #0xFFFF,%0\;divu{.w} %2,%0", operands);
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output_asm_insn (MOTOROLA ?
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"and%.l #0xFFFF,%0\;divu%.w %2,%0" :
|
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"and%.l #0xFFFF,%0\;divu %2,%0",
|
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operands);
|
||||
|
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if (!find_reg_note(insn, REG_UNUSED, operands[3]))
|
||||
{
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||||
|
|
@ -5487,7 +5506,7 @@
|
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if (REG_P (operands[0]))
|
||||
{
|
||||
if (INTVAL (operands[1]) + INTVAL (operands[2]) != 32)
|
||||
return "bfins %3,%0%{%b2:%b1%}";
|
||||
return "bfins %3,%0{%b2:%b1}";
|
||||
}
|
||||
else
|
||||
operands[0] = adjust_address (operands[0],
|
||||
|
|
@ -5542,7 +5561,7 @@
|
|||
if (REG_P (operands[1]))
|
||||
{
|
||||
if (INTVAL (operands[2]) + INTVAL (operands[3]) != 32)
|
||||
return "bfextu %1%{%b3:%b2%},%0";
|
||||
return "bfextu %1{%b3:%b2},%0";
|
||||
}
|
||||
else
|
||||
operands[1]
|
||||
|
|
@ -5595,7 +5614,7 @@
|
|||
if (REG_P (operands[1]))
|
||||
{
|
||||
if (INTVAL (operands[2]) + INTVAL (operands[3]) != 32)
|
||||
return "bfexts %1%{%b3:%b2%},%0";
|
||||
return "bfexts %1{%b3:%b2},%0";
|
||||
}
|
||||
else
|
||||
operands[1]
|
||||
|
|
@ -5626,7 +5645,7 @@
|
|||
(match_operand:SI 2 "nonmemory_operand" "dn")
|
||||
(match_operand:SI 3 "nonmemory_operand" "dn")))]
|
||||
"TARGET_68020 && TARGET_BITFIELD"
|
||||
"bfexts %1%{%b3:%b2%},%0")
|
||||
"bfexts %1{%b3:%b2},%0")
|
||||
|
||||
(define_expand "extzv"
|
||||
[(set (match_operand:SI 0 "register_operand" "")
|
||||
|
|
@ -5652,7 +5671,7 @@
|
|||
{
|
||||
CC_STATUS_INIT;
|
||||
}
|
||||
return "bfextu %1%{%b3:%b2%},%0";
|
||||
return "bfextu %1{%b3:%b2},%0";
|
||||
})
|
||||
|
||||
(define_insn ""
|
||||
|
|
@ -5667,7 +5686,7 @@
|
|||
&& (~ INTVAL (operands[3]) & ((1 << INTVAL (operands[1]))- 1)) == 0))"
|
||||
{
|
||||
CC_STATUS_INIT;
|
||||
return "bfchg %0%{%b2:%b1%}";
|
||||
return "bfchg %0{%b2:%b1}";
|
||||
})
|
||||
|
||||
(define_insn ""
|
||||
|
|
@ -5678,7 +5697,7 @@
|
|||
"TARGET_68020 && TARGET_BITFIELD"
|
||||
{
|
||||
CC_STATUS_INIT;
|
||||
return "bfclr %0%{%b2:%b1%}";
|
||||
return "bfclr %0{%b2:%b1}";
|
||||
})
|
||||
|
||||
(define_insn ""
|
||||
|
|
@ -5689,7 +5708,7 @@
|
|||
"TARGET_68020 && TARGET_BITFIELD"
|
||||
{
|
||||
CC_STATUS_INIT;
|
||||
return "bfset %0%{%b2:%b1%}";
|
||||
return "bfset %0{%b2:%b1}";
|
||||
})
|
||||
|
||||
(define_expand "insv"
|
||||
|
|
@ -5706,7 +5725,7 @@
|
|||
(match_operand:SI 2 "nonmemory_operand" "dn"))
|
||||
(match_operand:SI 3 "register_operand" "d"))]
|
||||
"TARGET_68020 && TARGET_BITFIELD"
|
||||
"bfins %3,%0%{%b2:%b1%}")
|
||||
"bfins %3,%0{%b2:%b1}")
|
||||
|
||||
;; Now recognize bit-field insns that operate on registers
|
||||
;; (or at least were intended to do so).
|
||||
|
|
@ -5717,7 +5736,7 @@
|
|||
(match_operand:SI 2 "const_int_operand" "n")
|
||||
(match_operand:SI 3 "const_int_operand" "n")))]
|
||||
"TARGET_68020 && TARGET_BITFIELD"
|
||||
"bfexts %1%{%b3:%b2%},%0")
|
||||
"bfexts %1{%b3:%b2},%0")
|
||||
|
||||
(define_insn ""
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=d")
|
||||
|
|
@ -5735,7 +5754,7 @@
|
|||
{
|
||||
CC_STATUS_INIT;
|
||||
}
|
||||
return "bfextu %1%{%b3:%b2%},%0";
|
||||
return "bfextu %1{%b3:%b2},%0";
|
||||
})
|
||||
|
||||
(define_insn ""
|
||||
|
|
@ -5746,7 +5765,7 @@
|
|||
"TARGET_68020 && TARGET_BITFIELD"
|
||||
{
|
||||
CC_STATUS_INIT;
|
||||
return "bfclr %0%{%b2:%b1%}";
|
||||
return "bfclr %0{%b2:%b1}";
|
||||
})
|
||||
|
||||
(define_insn ""
|
||||
|
|
@ -5757,7 +5776,7 @@
|
|||
"TARGET_68020 && TARGET_BITFIELD"
|
||||
{
|
||||
CC_STATUS_INIT;
|
||||
return "bfset %0%{%b2:%b1%}";
|
||||
return "bfset %0{%b2:%b1}";
|
||||
})
|
||||
|
||||
(define_insn ""
|
||||
|
|
@ -5776,7 +5795,7 @@
|
|||
&& INTVAL (operands[1]) == 24 && INTVAL (operands[2]) == 8)
|
||||
return "move%.b %3,%0";
|
||||
#endif
|
||||
return "bfins %3,%0%{%b2:%b1%}";
|
||||
return "bfins %3,%0{%b2:%b1}";
|
||||
})
|
||||
|
||||
;; Special patterns for optimizing bit-field instructions.
|
||||
|
|
@ -5801,7 +5820,7 @@
|
|||
}
|
||||
if (INTVAL (operands[1]) != 32)
|
||||
cc_status.flags = CC_NOT_NEGATIVE;
|
||||
return "bftst %0%{%b2:%b1%}";
|
||||
return "bftst %0{%b2:%b1}";
|
||||
})
|
||||
|
||||
|
||||
|
|
@ -5825,7 +5844,7 @@
|
|||
}
|
||||
if (INTVAL (operands[1]) != 32)
|
||||
cc_status.flags = CC_NOT_NEGATIVE;
|
||||
return "bftst %0%{%b2:%b1%}";
|
||||
return "bftst %0{%b2:%b1}";
|
||||
})
|
||||
|
||||
(define_insn "scc0_di"
|
||||
|
|
@ -6813,7 +6832,9 @@
|
|||
[(set (pc) (match_operand:SI 0 "register_operand" "a"))
|
||||
(use (label_ref (match_operand 1 "" "")))]
|
||||
""
|
||||
"jmp {(%0)|%0@}"
|
||||
{
|
||||
return MOTOROLA ? "jmp (%0)" : "jmp %0@";
|
||||
}
|
||||
[(set_attr "type" "bra")])
|
||||
|
||||
;; Jump to variable address from dispatch table of relative addresses.
|
||||
|
|
@ -6830,12 +6851,14 @@
|
|||
if (TARGET_COLDFIRE)
|
||||
{
|
||||
if (ADDRESS_REG_P (operands[0]))
|
||||
return "jmp {(2,pc,%0.l)|pc@(2,%0:l)}";
|
||||
return MOTOROLA ? "jmp (2,pc,%0.l)" : "jmp pc@(2,%0:l)";
|
||||
else if (MOTOROLA)
|
||||
return "ext%.l %0\;jmp (2,pc,%0.l)";
|
||||
else
|
||||
return "ext%.l %0\;jmp {(2,pc,%0.l)|pc@(2,%0:l)}";
|
||||
return "extl %0\;jmp pc@(2,%0:l)";
|
||||
}
|
||||
else
|
||||
return "jmp {(2,pc,%0.w)|pc@(2,%0:w)}";
|
||||
return MOTOROLA ? "jmp (2,pc,%0.w)" : "jmp pc@(2,%0:w)";
|
||||
#endif
|
||||
})
|
||||
|
||||
|
|
@ -7202,10 +7225,12 @@
|
|||
"TARGET_68020 || INTVAL (operands[1]) >= -0x8004"
|
||||
{
|
||||
operands[1] = GEN_INT (INTVAL (operands[1]) + 4);
|
||||
if (INTVAL (operands[1]) >= -0x8000)
|
||||
return "link{.w} %0,%1";
|
||||
if (!MOTOROLA)
|
||||
return "link %0,%1";
|
||||
else if (INTVAL (operands[1]) >= -0x8000)
|
||||
return "link.w %0,%1";
|
||||
else
|
||||
return "link{.l} %0,%1";
|
||||
return "link.l %0,%1";
|
||||
})
|
||||
|
||||
(define_expand "unlink"
|
||||
|
|
@ -7238,7 +7263,7 @@
|
|||
if (TARGET_ID_SHARED_LIBRARY)
|
||||
{
|
||||
operands[1] = gen_rtx_REG (Pmode, PIC_REG);
|
||||
return "move%.l {%?(%1)|%1@(%?)},%0";
|
||||
return MOTOROLA ? "move.l %?(%1),%0" : "movel %1@(%?), %0";
|
||||
}
|
||||
else if (MOTOROLA)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -553,7 +553,7 @@ UDItype __umulsidi3 (USItype, USItype);
|
|||
cpu32 disguises as a 68020, but lacks them. */
|
||||
#if defined (__mc68020__) && !defined (__mcpu32__)
|
||||
#define count_leading_zeros(count, x) \
|
||||
__asm__ ("bfffo %1%{%b2:%b2%},%0" \
|
||||
__asm__ ("bfffo %1{%b2:%b2},%0" \
|
||||
: "=d" ((USItype) (count)) \
|
||||
: "od" ((USItype) (x)), "n" (0))
|
||||
/* Some ColdFire architectures have a ff1 instruction supported via
|
||||
|
|
|
|||
Loading…
Reference in New Issue