S/390: Change 2-byte NOPs
The following patch changes "nopr %r7" to "nopr %r0" which is advantageous from a hardware perspective. It will only be emitted for hotpatching and should not impact normal code. gcc/ChangeLog: 2017-03-06 Robin Dapp <rdapp@linux.vnet.ibm.com> * config/s390/s390.c (s390_asm_output_function_label): Use nopr %r0. * config/s390/s390.md: Likewise. gcc/testsuite/ChangeLog: 2017-03-06 Robin Dapp <rdapp@linux.vnet.ibm.com> * gcc.target/s390/hotpatch-1.c: Check for nopr %r0. * gcc.target/s390/hotpatch-10.c: Likewise. * gcc.target/s390/hotpatch-11.c: Likewise. * gcc.target/s390/hotpatch-12.c: Likewise. * gcc.target/s390/hotpatch-13.c: Likewise. * gcc.target/s390/hotpatch-14.c: Likewise. * gcc.target/s390/hotpatch-15.c: Likewise. * gcc.target/s390/hotpatch-16.c: Likewise. * gcc.target/s390/hotpatch-17.c: Likewise. * gcc.target/s390/hotpatch-18.c: Likewise. * gcc.target/s390/hotpatch-19.c: Likewise. * gcc.target/s390/hotpatch-2.c: Likewise. * gcc.target/s390/hotpatch-26.c: Likewise. * gcc.target/s390/hotpatch-27.c: Likewise. * gcc.target/s390/hotpatch-28.c: Likewise. * gcc.target/s390/hotpatch-3.c: Likewise. * gcc.target/s390/hotpatch-4.c: Likewise. * gcc.target/s390/hotpatch-5.c: Likewise. * gcc.target/s390/hotpatch-6.c: Likewise. * gcc.target/s390/hotpatch-7.c: Likewise. * gcc.target/s390/hotpatch-8.c: Likewise. * gcc.target/s390/hotpatch-9.c: Likewise. From-SVN: r245917
This commit is contained in:
Robin Dapp
Andreas Krebbel
parent
5f215a70ba
commit
4bbc897068
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@ -1,3 +1,8 @@
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2017-03-06 Robin Dapp <rdapp@linux.vnet.ibm.com>
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* config/s390/s390.c (s390_asm_output_function_label): Use nopr %r0.
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* config/s390/s390.md: Likewise.
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2017-03-06 Jakub Jelinek <jakub@redhat.com>
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PR target/79812
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@ -7218,11 +7218,11 @@ s390_asm_output_function_label (FILE *asm_out_file, const char *fname,
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/* Add a trampoline code area before the function label and initialize it
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with two-byte nop instructions. This area can be overwritten with code
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that jumps to a patched version of the function. */
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asm_fprintf (asm_out_file, "\tnopr\t%%r7"
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asm_fprintf (asm_out_file, "\tnopr\t%%r0"
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"\t# pre-label NOPs for hotpatch (%d halfwords)\n",
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hw_before);
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for (i = 1; i < hw_before; i++)
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fputs ("\tnopr\t%r7\n", asm_out_file);
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fputs ("\tnopr\t%r0\n", asm_out_file);
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/* Note: The function label must be aligned so that (a) the bytes of the
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following nop do not cross a cacheline boundary, and (b) a jump address
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@ -10371,7 +10371,7 @@
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(define_insn "nop_2_byte"
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[(unspec_volatile [(const_int 0)] UNSPECV_NOP_2_BYTE)]
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""
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"nopr\t%%r7"
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"nopr\t%%r0"
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[(set_attr "op_type" "RR")])
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(define_insn "nop_4_byte"
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@ -1,3 +1,28 @@
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2017-03-06 Robin Dapp <rdapp@linux.vnet.ibm.com>
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* gcc.target/s390/hotpatch-1.c: Check for nopr %r0.
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* gcc.target/s390/hotpatch-10.c: Likewise.
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* gcc.target/s390/hotpatch-11.c: Likewise.
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* gcc.target/s390/hotpatch-12.c: Likewise.
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* gcc.target/s390/hotpatch-13.c: Likewise.
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* gcc.target/s390/hotpatch-14.c: Likewise.
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* gcc.target/s390/hotpatch-15.c: Likewise.
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* gcc.target/s390/hotpatch-16.c: Likewise.
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* gcc.target/s390/hotpatch-17.c: Likewise.
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* gcc.target/s390/hotpatch-18.c: Likewise.
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* gcc.target/s390/hotpatch-19.c: Likewise.
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* gcc.target/s390/hotpatch-2.c: Likewise.
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* gcc.target/s390/hotpatch-26.c: Likewise.
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* gcc.target/s390/hotpatch-27.c: Likewise.
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* gcc.target/s390/hotpatch-28.c: Likewise.
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* gcc.target/s390/hotpatch-3.c: Likewise.
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* gcc.target/s390/hotpatch-4.c: Likewise.
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* gcc.target/s390/hotpatch-5.c: Likewise.
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* gcc.target/s390/hotpatch-6.c: Likewise.
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* gcc.target/s390/hotpatch-7.c: Likewise.
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* gcc.target/s390/hotpatch-8.c: Likewise.
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* gcc.target/s390/hotpatch-9.c: Likewise.
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2017-03-06 Paolo Carlini <paolo.carlini@oracle.com>
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PR c++/64574
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@ -13,7 +13,7 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -13,7 +13,7 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -13,6 +13,6 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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@ -13,6 +13,6 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label.*(999 halfwords)" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 999 } } */
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/* { dg-final { scan-assembler-times "nopr\t%r0" 999 } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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@ -14,7 +14,7 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler "alignment for hotpatch" } } */
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@ -14,7 +14,7 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -14,6 +14,6 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
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/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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@ -14,6 +14,6 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
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/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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@ -14,7 +14,7 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -13,7 +13,7 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -19,6 +19,6 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
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/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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@ -13,7 +13,7 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(1 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nopr\t" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -11,7 +11,7 @@ __attribute__ ((noreturn)) void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label NOPs" } } */
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/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler "alignment for hotpatch" } } */
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@ -11,7 +11,7 @@ __attribute__ ((noreturn)) void hp3(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label NOPs" } } */
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/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler "alignment for hotpatch" } } */
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@ -12,7 +12,7 @@ void hp1 (volatile unsigned int *i)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label NOPs" } } */
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/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler "alignment for hotpatch" } } */
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@ -13,6 +13,6 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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@ -13,6 +13,6 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(3 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-times "brcl\t0, 0" 1 } } */
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@ -13,6 +13,6 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(4 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-times "brcl\t0, 0" 1 } } */
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@ -13,6 +13,6 @@ void hp1(void)
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(5 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-times "brcl\t0, 0" 1 } } */
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@ -13,6 +13,6 @@ void hp1(void)
|
|||
/* Check number of occurences of certain instructions. */
|
||||
/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
|
||||
/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(6 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*brcl\t0, 0" } } */
|
||||
/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
|
||||
/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
|
||||
/* { dg-final { scan-assembler-not "nop\t0" } } */
|
||||
/* { dg-final { scan-assembler-times "brcl\t0, 0" 2 } } */
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ void hp1(void)
|
|||
/* Check number of occurences of certain instructions. */
|
||||
/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
|
||||
/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(3 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
|
||||
/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
|
||||
/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
|
||||
/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
|
||||
|
|
|
|||
|
|
@ -13,6 +13,6 @@ void hp1(void)
|
|||
/* Check number of occurences of certain instructions. */
|
||||
/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
|
||||
/* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(4 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
|
||||
/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
|
||||
/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
|
||||
/* { dg-final { scan-assembler-times "nop\t0" 2 } } */
|
||||
/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
|
||||
|
|
|
|||
Loading…
Reference in New Issue