From 4bd5297f665fd3ba5691297c016809f3501e7fba Mon Sep 17 00:00:00 2001
From: "Cui,Lili" <lili.cui@intel.com>
Date: Tue, 4 Jan 2022 09:44:37 +0800
Subject: [PATCH] x86: Update model value for Alderlake and Rocketlake

gcc/ChangeLog

	* common/config/i386/cpuinfo.h (get_intel_cpu): Add new model values
	to Alderlake and Rocketlake.
---
 gcc/common/config/i386/cpuinfo.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
index 2d8ea201ab5..61b1a0f291c 100644
--- a/gcc/common/config/i386/cpuinfo.h
+++ b/gcc/common/config/i386/cpuinfo.h
@@ -415,6 +415,7 @@ get_intel_cpu (struct __processor_model *cpu_model,
       cpu_model->__cpu_subtype = INTEL_COREI7_SKYLAKE;
       break;
     case 0xa7:
+    case 0xa8:
       /* Rocket Lake.  */
       cpu = "rocketlake";
       CHECK___builtin_cpu_is ("corei7");
@@ -487,6 +488,7 @@ get_intel_cpu (struct __processor_model *cpu_model,
       break;
     case 0x97:
     case 0x9a:
+    case 0xbf:
       /* Alder Lake.  */
       cpu = "alderlake";
       CHECK___builtin_cpu_is ("corei7");