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m68k: Convert to atomic_test_and_set.

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* config/m68k/m68k.c (TARGET_ATOMIC_TEST_AND_SET_TRUEVAL): New.
        * config/m68k/sync.md (atomic_test_and_set): Rename from
        sync_test_and_setqi and adjust the operands.
        (atomic_test_and_set_1): Rename from sync_test_and_setqi_1
        and unconditionally enable.

From-SVN: r183585
This commit is contained in:
Richard Henderson 2012-01-26 14:07:44 -08:00 committed by Richard Henderson
parent 5a843a13dc
commit 4c1fd0845e
3 changed files with 20 additions and 10 deletions
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8
gcc/ChangeLog
View File

@ -1,3 +1,11 @@
2012-01-27 Richard Henderson <rth@redhat.com>
* config/m68k/m68k.c (TARGET_ATOMIC_TEST_AND_SET_TRUEVAL): New.
* config/m68k/sync.md (atomic_test_and_set): Rename from
sync_test_and_setqi and adjust the operands.
(atomic_test_and_set_1): Rename from sync_test_and_setqi_1
and unconditionally enable.
2012-01-27 Richard Henderson <rth@redhat.com>
* config/sparc/sparc.c (TARGET_ATOMIC_TEST_AND_SET_TRUEVAL): New.

4
gcc/config/m68k/m68k.c
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@ -303,6 +303,10 @@ static void m68k_init_sync_libfuncs (void) ATTRIBUTE_UNUSED;
#undef TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA
#define TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA m68k_output_addr_const_extra
/* The value stored by TAS. */
#undef TARGET_ATOMIC_TEST_AND_SET_TRUEVAL
#define TARGET_ATOMIC_TEST_AND_SET_TRUEVAL 128
static const struct attribute_spec m68k_attribute_table[] =
{
/* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler,

18
gcc/config/m68k/sync.md
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@ -56,25 +56,23 @@
;; Elide the seq if operands[0] is dead.
"cas<sz> %1,%4,%2\;seq %0")
(define_expand "sync_test_and_setqi"
[(match_operand:QI 0 "register_operand" "")
(match_operand:QI 1 "memory_operand" "")
(match_operand:QI 2 "general_operand" "")]
"!TARGET_CAS"
(define_expand "atomic_test_and_set"
[(match_operand:QI 0 "register_operand" "") ;; bool success output
(match_operand:QI 1 "memory_operand" "") ;; memory
(match_operand:SI 2 "const_int_operand" "")] ;; model
""
{
if (operands[2] != const1_rtx)
FAIL;
emit_insn (gen_sync_test_and_setqi_1 (operands[0], operands[1]));
emit_insn (gen_atomic_test_and_set_1 (operands[0], operands[1]));
emit_insn (gen_negqi2 (operands[0], operands[0]));
DONE;
})
(define_insn "sync_test_and_setqi_1"
(define_insn "atomic_test_and_set_1"
[(set (match_operand:QI 0 "register_operand" "=d")
(unspec_volatile:QI
[(match_operand:QI 1 "memory_operand" "+m")]
UNSPECV_TAS_1))
(set (match_dup 1)
(unspec_volatile:QI [(match_dup 1)] UNSPECV_TAS_2))]
"!TARGET_CAS"
""
"tas %1\;sne %0")