i386: Add AVX512 unaligned intrinsics
__m512i _mm512_loadu_epi64( void * sa); void _mm512_storeu_epi64(void * d, __m512i a); __m512i _mm512_loadu_epi32( void * sa); void _mm512_storeu_epi32(void * d, __m512i a); void _mm256_storeu_epi64(void * d, __m256i a); void _mm_storeu_epi64(void * d, __m128i a); void _mm256_storeu_epi32(void * d, __m256i a); void _mm_storeu_epi32(void * d, __m128i a); Tested on x86-64. 2019-07-11 Sunil K Pandey <sunil.k.pandey@intel.com> gcc/ PR target/90980 * config/i386/avx512fintrin.h (_mm512_loadu_epi64): New. (_mm512_storeu_epi64): Likewise. (_mm512_loadu_epi32): Likewise. (_mm512_storeu_epi32): Likewise. * config/i386/avx512vlintrin.h (_mm256_storeu_epi64): New. (_mm_storeu_epi64): Likewise. (_mm256_storeu_epi32): Likewise. (_mm_storeu_epi32): Likewise. gcc/testsuite/ PR target/90980 * gcc.target/i386/pr90980-1.c: New test. * gcc.target/i386/pr90980-2.c: Likewise. * gcc.target/i386/pr90980-3.c: Likewise. From-SVN: r273416
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@ -1,3 +1,15 @@
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2019-07-11 Sunil K Pandey <sunil.k.pandey@intel.com>
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PR target/90980
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* config/i386/avx512fintrin.h (_mm512_loadu_epi64): New.
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(_mm512_storeu_epi64): Likewise.
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(_mm512_loadu_epi32): Likewise.
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(_mm512_storeu_epi32): Likewise.
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* config/i386/avx512vlintrin.h (_mm256_storeu_epi64): New.
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(_mm_storeu_epi64): Likewise.
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(_mm256_storeu_epi32): Likewise.
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(_mm_storeu_epi32): Likewise.
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2019-07-11 Segher Boessenkool <segher@kernel.crashing.org>
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* config/rs6000/rs6000-logue.c: Add Modula-2 to comment.
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@ -6350,6 +6350,13 @@ _mm_mask_store_sd (double *__P, __mmask8 __U, __m128d __A)
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__builtin_ia32_storesd_mask (__P, (__v2df) __A, (__mmask8) __U);
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}
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extern __inline __m512i
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_loadu_epi64 (void const *__P)
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{
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return *(__m512i_u *) __P;
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}
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extern __inline __m512i
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_mask_loadu_epi64 (__m512i __W, __mmask8 __U, void const *__P)
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@ -6369,6 +6376,13 @@ _mm512_maskz_loadu_epi64 (__mmask8 __U, void const *__P)
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(__mmask8) __U);
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}
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extern __inline void
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_storeu_epi64 (void *__P, __m512i __A)
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{
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*(__m512i_u *) __P = (__m512i_u) __A;
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}
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extern __inline void
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_mask_storeu_epi64 (void *__P, __mmask8 __U, __m512i __A)
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@ -6384,6 +6398,13 @@ _mm512_loadu_si512 (void const *__P)
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return *(__m512i_u *)__P;
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}
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extern __inline __m512i
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_loadu_epi32 (void const *__P)
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{
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return *(__m512i_u *) __P;
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}
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extern __inline __m512i
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_mask_loadu_epi32 (__m512i __W, __mmask16 __U, void const *__P)
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@ -6410,6 +6431,13 @@ _mm512_storeu_si512 (void *__P, __m512i __A)
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*(__m512i_u *)__P = __A;
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}
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extern __inline void
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_storeu_epi32 (void *__P, __m512i __A)
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{
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*(__m512i_u *) __P = (__m512i_u) __A;
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}
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extern __inline void
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_mask_storeu_epi32 (void *__P, __mmask16 __U, __m512i __A)
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@ -755,6 +755,13 @@ _mm_maskz_loadu_epi64 (__mmask8 __U, void const *__P)
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(__mmask8) __U);
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}
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extern __inline void
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_storeu_epi64 (void *__P, __m256i __A)
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{
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*(__m256i_u *) __P = (__m256i_u) __A;
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}
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extern __inline void
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_mask_storeu_epi64 (void *__P, __mmask8 __U, __m256i __A)
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@ -764,6 +771,13 @@ _mm256_mask_storeu_epi64 (void *__P, __mmask8 __U, __m256i __A)
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(__mmask8) __U);
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}
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extern __inline void
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm_storeu_epi64 (void *__P, __m128i __A)
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{
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*(__m128i_u *) __P = (__m128i_u) __A;
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}
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extern __inline void
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm_mask_storeu_epi64 (void *__P, __mmask8 __U, __m128i __A)
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@ -811,6 +825,13 @@ _mm_maskz_loadu_epi32 (__mmask8 __U, void const *__P)
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(__mmask8) __U);
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}
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extern __inline void
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_storeu_epi32 (void *__P, __m256i __A)
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{
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*(__m256i_u *) __P = (__m256i_u) __A;
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}
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extern __inline void
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_mask_storeu_epi32 (void *__P, __mmask8 __U, __m256i __A)
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@ -820,6 +841,13 @@ _mm256_mask_storeu_epi32 (void *__P, __mmask8 __U, __m256i __A)
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(__mmask8) __U);
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}
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extern __inline void
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm_storeu_epi32 (void *__P, __m128i __A)
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{
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*(__m128i_u *) __P = (__m128i_u) __A;
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}
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extern __inline void
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm_mask_storeu_epi32 (void *__P, __mmask8 __U, __m128i __A)
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@ -1,3 +1,10 @@
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2019-07-11 Sunil K Pandey <sunil.k.pandey@intel.com>
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PR target/90980
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* gcc.target/i386/pr90980-1.c: New test.
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* gcc.target/i386/pr90980-2.c: Likewise.
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* gcc.target/i386/pr90980-3.c: Likewise.
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2019-07-11 Yannick Moy <moy@adacore.com>
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* gnat.dg/loop_entry1.adb: New testcase.
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17
gcc/testsuite/gcc.target/i386/pr90980-1.c
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17
gcc/testsuite/gcc.target/i386/pr90980-1.c
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/* { dg-do compile } */
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/* { dg-options "-march=skylake-avx512 -O2" } */
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/* { dg-final { scan-assembler-times "(?:vmovups|vmovdqu)\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 2 } } */
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#include <immintrin.h>
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int *a;
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long long *b;
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volatile __m128i xx;
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volatile __m128i xx1;
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void extern
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avx512vl_test (void)
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{
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_mm_storeu_epi32 (a, xx);
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_mm_storeu_epi64 (b, xx1);
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}
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gcc/testsuite/gcc.target/i386/pr90980-2.c
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17
gcc/testsuite/gcc.target/i386/pr90980-2.c
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/* { dg-do compile } */
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/* { dg-options "-march=skylake-avx512 -O2" } */
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/* { dg-final { scan-assembler-times "vmovdqu\[0-9\]*\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 2 } } */
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#include <immintrin.h>
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int *a;
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long long *b;
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volatile __m256i yy;
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volatile __m256i yy1;
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void extern
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avx512vl_test (void)
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{
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_mm256_storeu_epi32 (a, yy);
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_mm256_storeu_epi64 (b, yy1);
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}
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gcc/testsuite/gcc.target/i386/pr90980-3.c
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gcc/testsuite/gcc.target/i386/pr90980-3.c
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/* { dg-do compile } */
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/* { dg-options "-march=skylake-avx512 -O2" } */
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/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
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/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 2 } } */
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#include <immintrin.h>
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int *a;
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long long *b;
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volatile __m512i zz;
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volatile __m512i zz1;
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void extern
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avx512f_test (void)
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{
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zz = _mm512_loadu_epi32 (a);
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_mm512_storeu_epi32 (a, zz);
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zz1 = _mm512_loadu_epi64 (b);
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_mm512_storeu_epi64 (b, zz1);
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}
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