re PR target/63870 ([Aarch64] [ARM] Errors in use of NEON intrinsics are reported incorrectly)
gcc/ChangeLog:
2015-07-22 Charles Baylis <charles.baylis@linaro.org>
PR target/63870
* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
Add qualifier_struct_load_store_lane_index.
(aarch64_types_loadstruct_lane_qualifiers): Use
qualifier_struct_load_store_lane_index for lane index argument for
last argument.
(aarch64_types_storestruct_lane_qualifiers): Ditto.
(builtin_simd_arg): Add SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
(aarch64_simd_expand_args): Add new argument describing mode of
builtin. Check lane bounds for arguments with
SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
(aarch64_simd_expand_builtin): Emit error for incorrect lane indices
if marked with SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
(aarch64_simd_expand_builtin): Handle arguments with
qualifier_struct_load_store_lane_index. Pass machine mode of builtin to
aarch64_simd_expand_args.
* config/aarch64/aarch64-simd-builtins.def: Declare ld[234]_lane and
vst[234]_lane with BUILTIN_VALLDIF.
* config/aarch64/aarch64-simd.md:
(aarch64_vec_load_lanesoi_lane<mode>): Use VALLDIF iterator. Perform
endianness reversal on lane index.
(aarch64_vec_load_lanesci_lane<mode>): Ditto.
(aarch64_vec_load_lanesxi_lane<mode>): Ditto.
(vec_store_lanesoi_lane<mode>): Use VALLDIF iterator.
(vec_store_lanesci_lane<mode>): Ditto.
(vec_store_lanesxi_lane<mode>): Ditto.
(aarch64_ld2_lane<mode>): Use VALLDIF iterator. Remove endianness
reversal of lane index.
(aarch64_ld3_lane<mode>): Ditto.
(aarch64_ld4_lane<mode>): Ditto.
(aarch64_st2_lane<mode>): Ditto.
(aarch64_st3_lane<mode>): Ditto.
(aarch64_st4_lane<mode>): Ditto.
* config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Rename mode parameter
to qmode. Add new mode parameter. Update uses.
(__LD3_LANE_FUNC): Ditto.
(__LD4_LANE_FUNC): Ditto.
(__ST2_LANE_FUNC): Ditto.
(__ST3_LANE_FUNC): Ditto.
(__ST4_LANE_FUNC): Ditto.
gcc/testsuite/ChangeLog:
2015-07-22 Charles Baylis <charles.baylis@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c: New
test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c: New
test.
From-SVN: r226059
This commit is contained in:
Charles Baylis
Charles Baylis
parent
ebaec5f079
commit
4d0a023751
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@ -1,3 +1,46 @@
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2015-07-22 Charles Baylis <charles.baylis@linaro.org>
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PR target/63870
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* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
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Add qualifier_struct_load_store_lane_index.
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(aarch64_types_loadstruct_lane_qualifiers): Use
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qualifier_struct_load_store_lane_index for lane index argument for
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last argument.
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(aarch64_types_storestruct_lane_qualifiers): Ditto.
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(builtin_simd_arg): Add SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
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(aarch64_simd_expand_args): Add new argument describing mode of
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builtin. Check lane bounds for arguments with
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SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
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(aarch64_simd_expand_builtin): Emit error for incorrect lane indices
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if marked with SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
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(aarch64_simd_expand_builtin): Handle arguments with
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qualifier_struct_load_store_lane_index. Pass machine mode of builtin to
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aarch64_simd_expand_args.
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* config/aarch64/aarch64-simd-builtins.def: Declare ld[234]_lane and
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vst[234]_lane with BUILTIN_VALLDIF.
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* config/aarch64/aarch64-simd.md:
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(aarch64_vec_load_lanesoi_lane<mode>): Use VALLDIF iterator. Perform
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endianness reversal on lane index.
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(aarch64_vec_load_lanesci_lane<mode>): Ditto.
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(aarch64_vec_load_lanesxi_lane<mode>): Ditto.
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(vec_store_lanesoi_lane<mode>): Use VALLDIF iterator.
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(vec_store_lanesci_lane<mode>): Ditto.
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(vec_store_lanesxi_lane<mode>): Ditto.
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(aarch64_ld2_lane<mode>): Use VALLDIF iterator. Remove endianness
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reversal of lane index.
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(aarch64_ld3_lane<mode>): Ditto.
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(aarch64_ld4_lane<mode>): Ditto.
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(aarch64_st2_lane<mode>): Ditto.
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(aarch64_st3_lane<mode>): Ditto.
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(aarch64_st4_lane<mode>): Ditto.
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* config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Rename mode parameter
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to qmode. Add new mode parameter. Update uses.
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(__LD3_LANE_FUNC): Ditto.
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(__LD4_LANE_FUNC): Ditto.
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(__ST2_LANE_FUNC): Ditto.
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(__ST3_LANE_FUNC): Ditto.
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(__ST4_LANE_FUNC): Ditto.
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2015-07-22 Jonathan Wakely <jwakely@redhat.com>
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* doc/invoke.texi (Language Independent Options): Rename node to
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@ -114,7 +114,9 @@ enum aarch64_type_qualifiers
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/* Polynomial types. */
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qualifier_poly = 0x100,
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/* Lane indices - must be in range, and flipped for bigendian. */
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qualifier_lane_index = 0x200
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qualifier_lane_index = 0x200,
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/* Lane indices for single lane structure loads and stores. */
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qualifier_struct_load_store_lane_index = 0x400
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};
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typedef struct
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@ -216,7 +218,7 @@ aarch64_types_load1_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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static enum aarch64_type_qualifiers
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aarch64_types_loadstruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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= { qualifier_none, qualifier_const_pointer_map_mode,
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qualifier_none, qualifier_none };
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qualifier_none, qualifier_struct_load_store_lane_index };
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#define TYPES_LOADSTRUCT_LANE (aarch64_types_loadstruct_lane_qualifiers)
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static enum aarch64_type_qualifiers
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@ -248,7 +250,7 @@ aarch64_types_store1_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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static enum aarch64_type_qualifiers
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aarch64_types_storestruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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= { qualifier_void, qualifier_pointer_map_mode,
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qualifier_none, qualifier_none };
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qualifier_none, qualifier_struct_load_store_lane_index };
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#define TYPES_STORESTRUCT_LANE (aarch64_types_storestruct_lane_qualifiers)
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#define CF0(N, X) CODE_FOR_aarch64_##N##X
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@ -864,12 +866,14 @@ typedef enum
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SIMD_ARG_COPY_TO_REG,
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SIMD_ARG_CONSTANT,
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SIMD_ARG_LANE_INDEX,
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SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX,
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SIMD_ARG_STOP
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} builtin_simd_arg;
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static rtx
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aarch64_simd_expand_args (rtx target, int icode, int have_retval,
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tree exp, builtin_simd_arg *args)
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tree exp, builtin_simd_arg *args,
|
||||
enum machine_mode builtin_mode)
|
||||
{
|
||||
rtx pat;
|
||||
rtx op[SIMD_MAX_BUILTIN_ARGS + 1]; /* First element for result operand. */
|
||||
|
|
@ -908,6 +912,19 @@ aarch64_simd_expand_args (rtx target, int icode, int have_retval,
|
|||
op[opc] = copy_to_mode_reg (mode, op[opc]);
|
||||
break;
|
||||
|
||||
case SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX:
|
||||
gcc_assert (opc > 1);
|
||||
if (CONST_INT_P (op[opc]))
|
||||
{
|
||||
aarch64_simd_lane_bounds (op[opc], 0,
|
||||
GET_MODE_NUNITS (builtin_mode),
|
||||
exp);
|
||||
/* Keep to GCC-vector-extension lane indices in the RTL. */
|
||||
op[opc] =
|
||||
GEN_INT (ENDIAN_LANE_N (builtin_mode, INTVAL (op[opc])));
|
||||
}
|
||||
goto constant_arg;
|
||||
|
||||
case SIMD_ARG_LANE_INDEX:
|
||||
/* Must be a previous operand into which this is an index. */
|
||||
gcc_assert (opc > 0);
|
||||
|
|
@ -922,6 +939,7 @@ aarch64_simd_expand_args (rtx target, int icode, int have_retval,
|
|||
/* Fall through - if the lane index isn't a constant then
|
||||
the next case will error. */
|
||||
case SIMD_ARG_CONSTANT:
|
||||
constant_arg:
|
||||
if (!(*insn_data[icode].operand[opc].predicate)
|
||||
(op[opc], mode))
|
||||
{
|
||||
|
|
@ -1030,6 +1048,8 @@ aarch64_simd_expand_builtin (int fcode, tree exp, rtx target)
|
|||
|
||||
if (d->qualifiers[qualifiers_k] & qualifier_lane_index)
|
||||
args[k] = SIMD_ARG_LANE_INDEX;
|
||||
else if (d->qualifiers[qualifiers_k] & qualifier_struct_load_store_lane_index)
|
||||
args[k] = SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX;
|
||||
else if (d->qualifiers[qualifiers_k] & qualifier_immediate)
|
||||
args[k] = SIMD_ARG_CONSTANT;
|
||||
else if (d->qualifiers[qualifiers_k] & qualifier_maybe_immediate)
|
||||
|
|
@ -1053,7 +1073,7 @@ aarch64_simd_expand_builtin (int fcode, tree exp, rtx target)
|
|||
/* The interface to aarch64_simd_expand_args expects a 0 if
|
||||
the function is void, and a 1 if it is not. */
|
||||
return aarch64_simd_expand_args
|
||||
(target, icode, !is_void, exp, &args[1]);
|
||||
(target, icode, !is_void, exp, &args[1], d->mode);
|
||||
}
|
||||
|
||||
rtx
|
||||
|
|
|
|||
|
|
@ -88,9 +88,9 @@
|
|||
BUILTIN_VALLDIF (LOADSTRUCT, ld3r, 0)
|
||||
BUILTIN_VALLDIF (LOADSTRUCT, ld4r, 0)
|
||||
/* Implemented by aarch64_ld<VSTRUCT:nregs>_lane<VQ:mode>. */
|
||||
BUILTIN_VQ (LOADSTRUCT_LANE, ld2_lane, 0)
|
||||
BUILTIN_VQ (LOADSTRUCT_LANE, ld3_lane, 0)
|
||||
BUILTIN_VQ (LOADSTRUCT_LANE, ld4_lane, 0)
|
||||
BUILTIN_VALLDIF (LOADSTRUCT_LANE, ld2_lane, 0)
|
||||
BUILTIN_VALLDIF (LOADSTRUCT_LANE, ld3_lane, 0)
|
||||
BUILTIN_VALLDIF (LOADSTRUCT_LANE, ld4_lane, 0)
|
||||
/* Implemented by aarch64_st<VSTRUCT:nregs><VDC:mode>. */
|
||||
BUILTIN_VDC (STORESTRUCT, st2, 0)
|
||||
BUILTIN_VDC (STORESTRUCT, st3, 0)
|
||||
|
|
@ -100,9 +100,9 @@
|
|||
BUILTIN_VQ (STORESTRUCT, st3, 0)
|
||||
BUILTIN_VQ (STORESTRUCT, st4, 0)
|
||||
|
||||
BUILTIN_VQ (STORESTRUCT_LANE, st2_lane, 0)
|
||||
BUILTIN_VQ (STORESTRUCT_LANE, st3_lane, 0)
|
||||
BUILTIN_VQ (STORESTRUCT_LANE, st4_lane, 0)
|
||||
BUILTIN_VALLDIF (STORESTRUCT_LANE, st2_lane, 0)
|
||||
BUILTIN_VALLDIF (STORESTRUCT_LANE, st3_lane, 0)
|
||||
BUILTIN_VALLDIF (STORESTRUCT_LANE, st4_lane, 0)
|
||||
|
||||
BUILTIN_VQW (BINOP, saddl2, 0)
|
||||
BUILTIN_VQW (BINOP, uaddl2, 0)
|
||||
|
|
|
|||
|
|
@ -3919,10 +3919,13 @@
|
|||
(unspec:OI [(match_operand:<V_TWO_ELEM> 1 "aarch64_simd_struct_operand" "Utv")
|
||||
(match_operand:OI 2 "register_operand" "0")
|
||||
(match_operand:SI 3 "immediate_operand" "i")
|
||||
(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY) ]
|
||||
(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY) ]
|
||||
UNSPEC_LD2_LANE))]
|
||||
"TARGET_SIMD"
|
||||
"ld2\\t{%S0.<Vetype> - %T0.<Vetype>}[%3], %1"
|
||||
{
|
||||
operands[3] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[3])));
|
||||
return "ld2\\t{%S0.<Vetype> - %T0.<Vetype>}[%3], %1";
|
||||
}
|
||||
[(set_attr "type" "neon_load2_one_lane")]
|
||||
)
|
||||
|
||||
|
|
@ -3959,9 +3962,9 @@
|
|||
(define_insn "vec_store_lanesoi_lane<mode>"
|
||||
[(set (match_operand:<V_TWO_ELEM> 0 "aarch64_simd_struct_operand" "=Utv")
|
||||
(unspec:<V_TWO_ELEM> [(match_operand:OI 1 "register_operand" "w")
|
||||
(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
|
||||
(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
|
||||
(match_operand:SI 2 "immediate_operand" "i")]
|
||||
UNSPEC_ST2_LANE))]
|
||||
UNSPEC_ST2_LANE))]
|
||||
"TARGET_SIMD"
|
||||
{
|
||||
operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])));
|
||||
|
|
@ -4014,10 +4017,13 @@
|
|||
(unspec:CI [(match_operand:<V_THREE_ELEM> 1 "aarch64_simd_struct_operand" "Utv")
|
||||
(match_operand:CI 2 "register_operand" "0")
|
||||
(match_operand:SI 3 "immediate_operand" "i")
|
||||
(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
|
||||
(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
|
||||
UNSPEC_LD3_LANE))]
|
||||
"TARGET_SIMD"
|
||||
"ld3\\t{%S0.<Vetype> - %U0.<Vetype>}[%3], %1"
|
||||
{
|
||||
operands[3] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[3])));
|
||||
return "ld3\\t{%S0.<Vetype> - %U0.<Vetype>}[%3], %1";
|
||||
}
|
||||
[(set_attr "type" "neon_load3_one_lane")]
|
||||
)
|
||||
|
||||
|
|
@ -4054,9 +4060,9 @@
|
|||
(define_insn "vec_store_lanesci_lane<mode>"
|
||||
[(set (match_operand:<V_THREE_ELEM> 0 "aarch64_simd_struct_operand" "=Utv")
|
||||
(unspec:<V_THREE_ELEM> [(match_operand:CI 1 "register_operand" "w")
|
||||
(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
|
||||
(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
|
||||
(match_operand:SI 2 "immediate_operand" "i")]
|
||||
UNSPEC_ST3_LANE))]
|
||||
UNSPEC_ST3_LANE))]
|
||||
"TARGET_SIMD"
|
||||
{
|
||||
operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])));
|
||||
|
|
@ -4109,10 +4115,13 @@
|
|||
(unspec:XI [(match_operand:<V_FOUR_ELEM> 1 "aarch64_simd_struct_operand" "Utv")
|
||||
(match_operand:XI 2 "register_operand" "0")
|
||||
(match_operand:SI 3 "immediate_operand" "i")
|
||||
(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
|
||||
(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
|
||||
UNSPEC_LD4_LANE))]
|
||||
"TARGET_SIMD"
|
||||
"ld4\\t{%S0.<Vetype> - %V0.<Vetype>}[%3], %1"
|
||||
{
|
||||
operands[3] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[3])));
|
||||
return "ld4\\t{%S0.<Vetype> - %V0.<Vetype>}[%3], %1";
|
||||
}
|
||||
[(set_attr "type" "neon_load4_one_lane")]
|
||||
)
|
||||
|
||||
|
|
@ -4149,9 +4158,9 @@
|
|||
(define_insn "vec_store_lanesxi_lane<mode>"
|
||||
[(set (match_operand:<V_FOUR_ELEM> 0 "aarch64_simd_struct_operand" "=Utv")
|
||||
(unspec:<V_FOUR_ELEM> [(match_operand:XI 1 "register_operand" "w")
|
||||
(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
|
||||
(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
|
||||
(match_operand:SI 2 "immediate_operand" "i")]
|
||||
UNSPEC_ST4_LANE))]
|
||||
UNSPEC_ST4_LANE))]
|
||||
"TARGET_SIMD"
|
||||
{
|
||||
operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])));
|
||||
|
|
@ -4566,14 +4575,12 @@
|
|||
(match_operand:DI 1 "register_operand" "w")
|
||||
(match_operand:OI 2 "register_operand" "0")
|
||||
(match_operand:SI 3 "immediate_operand" "i")
|
||||
(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
|
||||
(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
|
||||
"TARGET_SIMD"
|
||||
{
|
||||
machine_mode mode = <V_TWO_ELEM>mode;
|
||||
rtx mem = gen_rtx_MEM (mode, operands[1]);
|
||||
|
||||
aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode),
|
||||
NULL);
|
||||
emit_insn (gen_aarch64_vec_load_lanesoi_lane<mode> (operands[0],
|
||||
mem,
|
||||
operands[2],
|
||||
|
|
@ -4586,14 +4593,12 @@
|
|||
(match_operand:DI 1 "register_operand" "w")
|
||||
(match_operand:CI 2 "register_operand" "0")
|
||||
(match_operand:SI 3 "immediate_operand" "i")
|
||||
(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
|
||||
(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
|
||||
"TARGET_SIMD"
|
||||
{
|
||||
machine_mode mode = <V_THREE_ELEM>mode;
|
||||
rtx mem = gen_rtx_MEM (mode, operands[1]);
|
||||
|
||||
aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode),
|
||||
NULL);
|
||||
emit_insn (gen_aarch64_vec_load_lanesci_lane<mode> (operands[0],
|
||||
mem,
|
||||
operands[2],
|
||||
|
|
@ -4606,14 +4611,12 @@
|
|||
(match_operand:DI 1 "register_operand" "w")
|
||||
(match_operand:XI 2 "register_operand" "0")
|
||||
(match_operand:SI 3 "immediate_operand" "i")
|
||||
(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
|
||||
(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
|
||||
"TARGET_SIMD"
|
||||
{
|
||||
machine_mode mode = <V_FOUR_ELEM>mode;
|
||||
rtx mem = gen_rtx_MEM (mode, operands[1]);
|
||||
|
||||
aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode),
|
||||
NULL);
|
||||
emit_insn (gen_aarch64_vec_load_lanesxi_lane<mode> (operands[0],
|
||||
mem,
|
||||
operands[2],
|
||||
|
|
@ -4850,54 +4853,45 @@
|
|||
DONE;
|
||||
})
|
||||
|
||||
(define_expand "aarch64_st2_lane<VQ:mode>"
|
||||
(define_expand "aarch64_st2_lane<mode>"
|
||||
[(match_operand:DI 0 "register_operand" "r")
|
||||
(match_operand:OI 1 "register_operand" "w")
|
||||
(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
|
||||
(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
|
||||
(match_operand:SI 2 "immediate_operand")]
|
||||
"TARGET_SIMD"
|
||||
{
|
||||
machine_mode mode = <V_TWO_ELEM>mode;
|
||||
rtx mem = gen_rtx_MEM (mode, operands[0]);
|
||||
operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])));
|
||||
|
||||
emit_insn (gen_vec_store_lanesoi_lane<VQ:mode> (mem,
|
||||
operands[1],
|
||||
operands[2]));
|
||||
emit_insn (gen_vec_store_lanesoi_lane<mode> (mem, operands[1], operands[2]));
|
||||
DONE;
|
||||
})
|
||||
|
||||
(define_expand "aarch64_st3_lane<VQ:mode>"
|
||||
(define_expand "aarch64_st3_lane<mode>"
|
||||
[(match_operand:DI 0 "register_operand" "r")
|
||||
(match_operand:CI 1 "register_operand" "w")
|
||||
(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
|
||||
(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
|
||||
(match_operand:SI 2 "immediate_operand")]
|
||||
"TARGET_SIMD"
|
||||
{
|
||||
machine_mode mode = <V_THREE_ELEM>mode;
|
||||
rtx mem = gen_rtx_MEM (mode, operands[0]);
|
||||
operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])));
|
||||
|
||||
emit_insn (gen_vec_store_lanesci_lane<VQ:mode> (mem,
|
||||
operands[1],
|
||||
operands[2]));
|
||||
emit_insn (gen_vec_store_lanesci_lane<mode> (mem, operands[1], operands[2]));
|
||||
DONE;
|
||||
})
|
||||
|
||||
(define_expand "aarch64_st4_lane<VQ:mode>"
|
||||
(define_expand "aarch64_st4_lane<mode>"
|
||||
[(match_operand:DI 0 "register_operand" "r")
|
||||
(match_operand:XI 1 "register_operand" "w")
|
||||
(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
|
||||
(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
|
||||
(match_operand:SI 2 "immediate_operand")]
|
||||
"TARGET_SIMD"
|
||||
{
|
||||
machine_mode mode = <V_FOUR_ELEM>mode;
|
||||
rtx mem = gen_rtx_MEM (mode, operands[0]);
|
||||
operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])));
|
||||
|
||||
emit_insn (gen_vec_store_lanesxi_lane<VQ:mode> (mem,
|
||||
operands[1],
|
||||
operands[2]));
|
||||
emit_insn (gen_vec_store_lanesxi_lane<mode> (mem, operands[1], operands[2]));
|
||||
DONE;
|
||||
})
|
||||
|
||||
|
|
|
|||
|
|
@ -9950,8 +9950,8 @@ __STRUCTN (float, 64, 4)
|
|||
#undef __STRUCTN
|
||||
|
||||
|
||||
#define __ST2_LANE_FUNC(intype, largetype, ptrtype, \
|
||||
mode, ptr_mode, funcsuffix, signedtype) \
|
||||
#define __ST2_LANE_FUNC(intype, largetype, ptrtype, mode, \
|
||||
qmode, ptr_mode, funcsuffix, signedtype) \
|
||||
__extension__ static __inline void \
|
||||
__attribute__ ((__always_inline__)) \
|
||||
vst2_lane_ ## funcsuffix (ptrtype *__ptr, \
|
||||
|
|
@ -9965,31 +9965,37 @@ vst2_lane_ ## funcsuffix (ptrtype *__ptr, \
|
|||
__temp.val[1] \
|
||||
= vcombine_##funcsuffix (__b.val[1], \
|
||||
vcreate_##funcsuffix (__AARCH64_UINT64_C (0))); \
|
||||
__o = __builtin_aarch64_set_qregoi##mode (__o, \
|
||||
(signedtype) __temp.val[0], 0); \
|
||||
__o = __builtin_aarch64_set_qregoi##mode (__o, \
|
||||
(signedtype) __temp.val[1], 1); \
|
||||
__o = __builtin_aarch64_set_qregoi##qmode (__o, \
|
||||
(signedtype) __temp.val[0], 0); \
|
||||
__o = __builtin_aarch64_set_qregoi##qmode (__o, \
|
||||
(signedtype) __temp.val[1], 1); \
|
||||
__builtin_aarch64_st2_lane##mode ((__builtin_aarch64_simd_ ## ptr_mode *) \
|
||||
__ptr, __o, __c); \
|
||||
}
|
||||
|
||||
__ST2_LANE_FUNC (float32x2x2_t, float32x4x2_t, float32_t, v4sf, sf, f32,
|
||||
__ST2_LANE_FUNC (float32x2x2_t, float32x4x2_t, float32_t, v2sf, v4sf, sf, f32,
|
||||
float32x4_t)
|
||||
__ST2_LANE_FUNC (float64x1x2_t, float64x2x2_t, float64_t, v2df, df, f64,
|
||||
__ST2_LANE_FUNC (float64x1x2_t, float64x2x2_t, float64_t, df, v2df, df, f64,
|
||||
float64x2_t)
|
||||
__ST2_LANE_FUNC (poly8x8x2_t, poly8x16x2_t, poly8_t, v16qi, qi, p8, int8x16_t)
|
||||
__ST2_LANE_FUNC (poly16x4x2_t, poly16x8x2_t, poly16_t, v8hi, hi, p16,
|
||||
__ST2_LANE_FUNC (poly8x8x2_t, poly8x16x2_t, poly8_t, v8qi, v16qi, qi, p8,
|
||||
int8x16_t)
|
||||
__ST2_LANE_FUNC (poly16x4x2_t, poly16x8x2_t, poly16_t, v4hi, v8hi, hi, p16,
|
||||
int16x8_t)
|
||||
__ST2_LANE_FUNC (int8x8x2_t, int8x16x2_t, int8_t, v16qi, qi, s8, int8x16_t)
|
||||
__ST2_LANE_FUNC (int16x4x2_t, int16x8x2_t, int16_t, v8hi, hi, s16, int16x8_t)
|
||||
__ST2_LANE_FUNC (int32x2x2_t, int32x4x2_t, int32_t, v4si, si, s32, int32x4_t)
|
||||
__ST2_LANE_FUNC (int64x1x2_t, int64x2x2_t, int64_t, v2di, di, s64, int64x2_t)
|
||||
__ST2_LANE_FUNC (uint8x8x2_t, uint8x16x2_t, uint8_t, v16qi, qi, u8, int8x16_t)
|
||||
__ST2_LANE_FUNC (uint16x4x2_t, uint16x8x2_t, uint16_t, v8hi, hi, u16,
|
||||
__ST2_LANE_FUNC (int8x8x2_t, int8x16x2_t, int8_t, v8qi, v16qi, qi, s8,
|
||||
int8x16_t)
|
||||
__ST2_LANE_FUNC (int16x4x2_t, int16x8x2_t, int16_t, v4hi, v8hi, hi, s16,
|
||||
int16x8_t)
|
||||
__ST2_LANE_FUNC (uint32x2x2_t, uint32x4x2_t, uint32_t, v4si, si, u32,
|
||||
__ST2_LANE_FUNC (int32x2x2_t, int32x4x2_t, int32_t, v2si, v4si, si, s32,
|
||||
int32x4_t)
|
||||
__ST2_LANE_FUNC (uint64x1x2_t, uint64x2x2_t, uint64_t, v2di, di, u64,
|
||||
__ST2_LANE_FUNC (int64x1x2_t, int64x2x2_t, int64_t, di, v2di, di, s64,
|
||||
int64x2_t)
|
||||
__ST2_LANE_FUNC (uint8x8x2_t, uint8x16x2_t, uint8_t, v8qi, v16qi, qi, u8,
|
||||
int8x16_t)
|
||||
__ST2_LANE_FUNC (uint16x4x2_t, uint16x8x2_t, uint16_t, v4hi, v8hi, hi, u16,
|
||||
int16x8_t)
|
||||
__ST2_LANE_FUNC (uint32x2x2_t, uint32x4x2_t, uint32_t, v2si, v4si, si, u32,
|
||||
int32x4_t)
|
||||
__ST2_LANE_FUNC (uint64x1x2_t, uint64x2x2_t, uint64_t, di, v2di, di, u64,
|
||||
int64x2_t)
|
||||
|
||||
#undef __ST2_LANE_FUNC
|
||||
|
|
@ -10018,8 +10024,8 @@ __ST2_LANE_FUNC (uint16x8x2_t, uint16_t, v8hi, hi, u16)
|
|||
__ST2_LANE_FUNC (uint32x4x2_t, uint32_t, v4si, si, u32)
|
||||
__ST2_LANE_FUNC (uint64x2x2_t, uint64_t, v2di, di, u64)
|
||||
|
||||
#define __ST3_LANE_FUNC(intype, largetype, ptrtype, \
|
||||
mode, ptr_mode, funcsuffix, signedtype) \
|
||||
#define __ST3_LANE_FUNC(intype, largetype, ptrtype, mode, \
|
||||
qmode, ptr_mode, funcsuffix, signedtype) \
|
||||
__extension__ static __inline void \
|
||||
__attribute__ ((__always_inline__)) \
|
||||
vst3_lane_ ## funcsuffix (ptrtype *__ptr, \
|
||||
|
|
@ -10036,33 +10042,39 @@ vst3_lane_ ## funcsuffix (ptrtype *__ptr, \
|
|||
__temp.val[2] \
|
||||
= vcombine_##funcsuffix (__b.val[2], \
|
||||
vcreate_##funcsuffix (__AARCH64_UINT64_C (0))); \
|
||||
__o = __builtin_aarch64_set_qregci##mode (__o, \
|
||||
(signedtype) __temp.val[0], 0); \
|
||||
__o = __builtin_aarch64_set_qregci##mode (__o, \
|
||||
(signedtype) __temp.val[1], 1); \
|
||||
__o = __builtin_aarch64_set_qregci##mode (__o, \
|
||||
(signedtype) __temp.val[2], 2); \
|
||||
__o = __builtin_aarch64_set_qregci##qmode (__o, \
|
||||
(signedtype) __temp.val[0], 0); \
|
||||
__o = __builtin_aarch64_set_qregci##qmode (__o, \
|
||||
(signedtype) __temp.val[1], 1); \
|
||||
__o = __builtin_aarch64_set_qregci##qmode (__o, \
|
||||
(signedtype) __temp.val[2], 2); \
|
||||
__builtin_aarch64_st3_lane##mode ((__builtin_aarch64_simd_ ## ptr_mode *) \
|
||||
__ptr, __o, __c); \
|
||||
}
|
||||
|
||||
__ST3_LANE_FUNC (float32x2x3_t, float32x4x3_t, float32_t, v4sf, sf, f32,
|
||||
__ST3_LANE_FUNC (float32x2x3_t, float32x4x3_t, float32_t, v2sf, v4sf, sf, f32,
|
||||
float32x4_t)
|
||||
__ST3_LANE_FUNC (float64x1x3_t, float64x2x3_t, float64_t, v2df, df, f64,
|
||||
__ST3_LANE_FUNC (float64x1x3_t, float64x2x3_t, float64_t, df, v2df, df, f64,
|
||||
float64x2_t)
|
||||
__ST3_LANE_FUNC (poly8x8x3_t, poly8x16x3_t, poly8_t, v16qi, qi, p8, int8x16_t)
|
||||
__ST3_LANE_FUNC (poly16x4x3_t, poly16x8x3_t, poly16_t, v8hi, hi, p16,
|
||||
__ST3_LANE_FUNC (poly8x8x3_t, poly8x16x3_t, poly8_t, v8qi, v16qi, qi, p8,
|
||||
int8x16_t)
|
||||
__ST3_LANE_FUNC (poly16x4x3_t, poly16x8x3_t, poly16_t, v4hi, v8hi, hi, p16,
|
||||
int16x8_t)
|
||||
__ST3_LANE_FUNC (int8x8x3_t, int8x16x3_t, int8_t, v16qi, qi, s8, int8x16_t)
|
||||
__ST3_LANE_FUNC (int16x4x3_t, int16x8x3_t, int16_t, v8hi, hi, s16, int16x8_t)
|
||||
__ST3_LANE_FUNC (int32x2x3_t, int32x4x3_t, int32_t, v4si, si, s32, int32x4_t)
|
||||
__ST3_LANE_FUNC (int64x1x3_t, int64x2x3_t, int64_t, v2di, di, s64, int64x2_t)
|
||||
__ST3_LANE_FUNC (uint8x8x3_t, uint8x16x3_t, uint8_t, v16qi, qi, u8, int8x16_t)
|
||||
__ST3_LANE_FUNC (uint16x4x3_t, uint16x8x3_t, uint16_t, v8hi, hi, u16,
|
||||
__ST3_LANE_FUNC (int8x8x3_t, int8x16x3_t, int8_t, v8qi, v16qi, qi, s8,
|
||||
int8x16_t)
|
||||
__ST3_LANE_FUNC (int16x4x3_t, int16x8x3_t, int16_t, v4hi, v8hi, hi, s16,
|
||||
int16x8_t)
|
||||
__ST3_LANE_FUNC (uint32x2x3_t, uint32x4x3_t, uint32_t, v4si, si, u32,
|
||||
__ST3_LANE_FUNC (int32x2x3_t, int32x4x3_t, int32_t, v2si, v4si, si, s32,
|
||||
int32x4_t)
|
||||
__ST3_LANE_FUNC (uint64x1x3_t, uint64x2x3_t, uint64_t, v2di, di, u64,
|
||||
__ST3_LANE_FUNC (int64x1x3_t, int64x2x3_t, int64_t, di, v2di, di, s64,
|
||||
int64x2_t)
|
||||
__ST3_LANE_FUNC (uint8x8x3_t, uint8x16x3_t, uint8_t, v8qi, v16qi, qi, u8,
|
||||
int8x16_t)
|
||||
__ST3_LANE_FUNC (uint16x4x3_t, uint16x8x3_t, uint16_t, v4hi, v8hi, hi, u16,
|
||||
int16x8_t)
|
||||
__ST3_LANE_FUNC (uint32x2x3_t, uint32x4x3_t, uint32_t, v2si, v4si, si, u32,
|
||||
int32x4_t)
|
||||
__ST3_LANE_FUNC (uint64x1x3_t, uint64x2x3_t, uint64_t, di, v2di, di, u64,
|
||||
int64x2_t)
|
||||
|
||||
#undef __ST3_LANE_FUNC
|
||||
|
|
@ -10091,8 +10103,8 @@ __ST3_LANE_FUNC (uint16x8x3_t, uint16_t, v8hi, hi, u16)
|
|||
__ST3_LANE_FUNC (uint32x4x3_t, uint32_t, v4si, si, u32)
|
||||
__ST3_LANE_FUNC (uint64x2x3_t, uint64_t, v2di, di, u64)
|
||||
|
||||
#define __ST4_LANE_FUNC(intype, largetype, ptrtype, \
|
||||
mode, ptr_mode, funcsuffix, signedtype) \
|
||||
#define __ST4_LANE_FUNC(intype, largetype, ptrtype, mode, \
|
||||
qmode, ptr_mode, funcsuffix, signedtype) \
|
||||
__extension__ static __inline void \
|
||||
__attribute__ ((__always_inline__)) \
|
||||
vst4_lane_ ## funcsuffix (ptrtype *__ptr, \
|
||||
|
|
@ -10112,35 +10124,41 @@ vst4_lane_ ## funcsuffix (ptrtype *__ptr, \
|
|||
__temp.val[3] \
|
||||
= vcombine_##funcsuffix (__b.val[3], \
|
||||
vcreate_##funcsuffix (__AARCH64_UINT64_C (0))); \
|
||||
__o = __builtin_aarch64_set_qregxi##mode (__o, \
|
||||
(signedtype) __temp.val[0], 0); \
|
||||
__o = __builtin_aarch64_set_qregxi##mode (__o, \
|
||||
(signedtype) __temp.val[1], 1); \
|
||||
__o = __builtin_aarch64_set_qregxi##mode (__o, \
|
||||
(signedtype) __temp.val[2], 2); \
|
||||
__o = __builtin_aarch64_set_qregxi##mode (__o, \
|
||||
(signedtype) __temp.val[3], 3); \
|
||||
__o = __builtin_aarch64_set_qregxi##qmode (__o, \
|
||||
(signedtype) __temp.val[0], 0); \
|
||||
__o = __builtin_aarch64_set_qregxi##qmode (__o, \
|
||||
(signedtype) __temp.val[1], 1); \
|
||||
__o = __builtin_aarch64_set_qregxi##qmode (__o, \
|
||||
(signedtype) __temp.val[2], 2); \
|
||||
__o = __builtin_aarch64_set_qregxi##qmode (__o, \
|
||||
(signedtype) __temp.val[3], 3); \
|
||||
__builtin_aarch64_st4_lane##mode ((__builtin_aarch64_simd_ ## ptr_mode *) \
|
||||
__ptr, __o, __c); \
|
||||
}
|
||||
|
||||
__ST4_LANE_FUNC (float32x2x4_t, float32x4x4_t, float32_t, v4sf, sf, f32,
|
||||
__ST4_LANE_FUNC (float32x2x4_t, float32x4x4_t, float32_t, v2sf, v4sf, sf, f32,
|
||||
float32x4_t)
|
||||
__ST4_LANE_FUNC (float64x1x4_t, float64x2x4_t, float64_t, v2df, df, f64,
|
||||
__ST4_LANE_FUNC (float64x1x4_t, float64x2x4_t, float64_t, df, v2df, df, f64,
|
||||
float64x2_t)
|
||||
__ST4_LANE_FUNC (poly8x8x4_t, poly8x16x4_t, poly8_t, v16qi, qi, p8, int8x16_t)
|
||||
__ST4_LANE_FUNC (poly16x4x4_t, poly16x8x4_t, poly16_t, v8hi, hi, p16,
|
||||
__ST4_LANE_FUNC (poly8x8x4_t, poly8x16x4_t, poly8_t, v8qi, v16qi, qi, p8,
|
||||
int8x16_t)
|
||||
__ST4_LANE_FUNC (poly16x4x4_t, poly16x8x4_t, poly16_t, v4hi, v8hi, hi, p16,
|
||||
int16x8_t)
|
||||
__ST4_LANE_FUNC (int8x8x4_t, int8x16x4_t, int8_t, v16qi, qi, s8, int8x16_t)
|
||||
__ST4_LANE_FUNC (int16x4x4_t, int16x8x4_t, int16_t, v8hi, hi, s16, int16x8_t)
|
||||
__ST4_LANE_FUNC (int32x2x4_t, int32x4x4_t, int32_t, v4si, si, s32, int32x4_t)
|
||||
__ST4_LANE_FUNC (int64x1x4_t, int64x2x4_t, int64_t, v2di, di, s64, int64x2_t)
|
||||
__ST4_LANE_FUNC (uint8x8x4_t, uint8x16x4_t, uint8_t, v16qi, qi, u8, int8x16_t)
|
||||
__ST4_LANE_FUNC (uint16x4x4_t, uint16x8x4_t, uint16_t, v8hi, hi, u16,
|
||||
__ST4_LANE_FUNC (int8x8x4_t, int8x16x4_t, int8_t, v8qi, v16qi, qi, s8,
|
||||
int8x16_t)
|
||||
__ST4_LANE_FUNC (int16x4x4_t, int16x8x4_t, int16_t, v4hi, v8hi, hi, s16,
|
||||
int16x8_t)
|
||||
__ST4_LANE_FUNC (uint32x2x4_t, uint32x4x4_t, uint32_t, v4si, si, u32,
|
||||
__ST4_LANE_FUNC (int32x2x4_t, int32x4x4_t, int32_t, v2si, v4si, si, s32,
|
||||
int32x4_t)
|
||||
__ST4_LANE_FUNC (uint64x1x4_t, uint64x2x4_t, uint64_t, v2di, di, u64,
|
||||
__ST4_LANE_FUNC (int64x1x4_t, int64x2x4_t, int64_t, di, v2di, di, s64,
|
||||
int64x2_t)
|
||||
__ST4_LANE_FUNC (uint8x8x4_t, uint8x16x4_t, uint8_t, v8qi, v16qi, qi, u8,
|
||||
int8x16_t)
|
||||
__ST4_LANE_FUNC (uint16x4x4_t, uint16x8x4_t, uint16_t, v4hi, v8hi, hi, u16,
|
||||
int16x8_t)
|
||||
__ST4_LANE_FUNC (uint32x2x4_t, uint32x4x4_t, uint32_t, v2si, v4si, si, u32,
|
||||
int32x4_t)
|
||||
__ST4_LANE_FUNC (uint64x1x4_t, uint64x2x4_t, uint64_t, di, v2di, di, u64,
|
||||
int64x2_t)
|
||||
|
||||
#undef __ST4_LANE_FUNC
|
||||
|
|
@ -16799,8 +16817,8 @@ vld4q_dup_f64 (const float64_t * __a)
|
|||
|
||||
/* vld2_lane */
|
||||
|
||||
#define __LD2_LANE_FUNC(intype, vectype, largetype, ptrtype, \
|
||||
mode, ptrmode, funcsuffix, signedtype) \
|
||||
#define __LD2_LANE_FUNC(intype, vectype, largetype, ptrtype, mode, \
|
||||
qmode, ptrmode, funcsuffix, signedtype) \
|
||||
__extension__ static __inline intype __attribute__ ((__always_inline__)) \
|
||||
vld2_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c) \
|
||||
{ \
|
||||
|
|
@ -16810,12 +16828,12 @@ vld2_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c) \
|
|||
vcombine_##funcsuffix (__b.val[0], vcreate_##funcsuffix (0)); \
|
||||
__temp.val[1] = \
|
||||
vcombine_##funcsuffix (__b.val[1], vcreate_##funcsuffix (0)); \
|
||||
__o = __builtin_aarch64_set_qregoi##mode (__o, \
|
||||
(signedtype) __temp.val[0], \
|
||||
0); \
|
||||
__o = __builtin_aarch64_set_qregoi##mode (__o, \
|
||||
(signedtype) __temp.val[1], \
|
||||
1); \
|
||||
__o = __builtin_aarch64_set_qregoi##qmode (__o, \
|
||||
(signedtype) __temp.val[0], \
|
||||
0); \
|
||||
__o = __builtin_aarch64_set_qregoi##qmode (__o, \
|
||||
(signedtype) __temp.val[1], \
|
||||
1); \
|
||||
__o = __builtin_aarch64_ld2_lane##mode ( \
|
||||
(__builtin_aarch64_simd_##ptrmode *) __ptr, __o, __c); \
|
||||
__b.val[0] = (vectype) __builtin_aarch64_get_dregoidi (__o, 0); \
|
||||
|
|
@ -16823,29 +16841,29 @@ vld2_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c) \
|
|||
return __b; \
|
||||
}
|
||||
|
||||
__LD2_LANE_FUNC (float32x2x2_t, float32x2_t, float32x4x2_t, float32_t, v4sf,
|
||||
__LD2_LANE_FUNC (float32x2x2_t, float32x2_t, float32x4x2_t, float32_t, v2sf, v4sf,
|
||||
sf, f32, float32x4_t)
|
||||
__LD2_LANE_FUNC (float64x1x2_t, float64x1_t, float64x2x2_t, float64_t, v2df,
|
||||
__LD2_LANE_FUNC (float64x1x2_t, float64x1_t, float64x2x2_t, float64_t, df, v2df,
|
||||
df, f64, float64x2_t)
|
||||
__LD2_LANE_FUNC (poly8x8x2_t, poly8x8_t, poly8x16x2_t, poly8_t, v16qi, qi, p8,
|
||||
__LD2_LANE_FUNC (poly8x8x2_t, poly8x8_t, poly8x16x2_t, poly8_t, v8qi, v16qi, qi, p8,
|
||||
int8x16_t)
|
||||
__LD2_LANE_FUNC (poly16x4x2_t, poly16x4_t, poly16x8x2_t, poly16_t, v8hi, hi,
|
||||
__LD2_LANE_FUNC (poly16x4x2_t, poly16x4_t, poly16x8x2_t, poly16_t, v4hi, v8hi, hi,
|
||||
p16, int16x8_t)
|
||||
__LD2_LANE_FUNC (int8x8x2_t, int8x8_t, int8x16x2_t, int8_t, v16qi, qi, s8,
|
||||
__LD2_LANE_FUNC (int8x8x2_t, int8x8_t, int8x16x2_t, int8_t, v8qi, v16qi, qi, s8,
|
||||
int8x16_t)
|
||||
__LD2_LANE_FUNC (int16x4x2_t, int16x4_t, int16x8x2_t, int16_t, v8hi, hi, s16,
|
||||
__LD2_LANE_FUNC (int16x4x2_t, int16x4_t, int16x8x2_t, int16_t, v4hi, v8hi, hi, s16,
|
||||
int16x8_t)
|
||||
__LD2_LANE_FUNC (int32x2x2_t, int32x2_t, int32x4x2_t, int32_t, v4si, si, s32,
|
||||
__LD2_LANE_FUNC (int32x2x2_t, int32x2_t, int32x4x2_t, int32_t, v2si, v4si, si, s32,
|
||||
int32x4_t)
|
||||
__LD2_LANE_FUNC (int64x1x2_t, int64x1_t, int64x2x2_t, int64_t, v2di, di, s64,
|
||||
__LD2_LANE_FUNC (int64x1x2_t, int64x1_t, int64x2x2_t, int64_t, di, v2di, di, s64,
|
||||
int64x2_t)
|
||||
__LD2_LANE_FUNC (uint8x8x2_t, uint8x8_t, uint8x16x2_t, uint8_t, v16qi, qi, u8,
|
||||
__LD2_LANE_FUNC (uint8x8x2_t, uint8x8_t, uint8x16x2_t, uint8_t, v8qi, v16qi, qi, u8,
|
||||
int8x16_t)
|
||||
__LD2_LANE_FUNC (uint16x4x2_t, uint16x4_t, uint16x8x2_t, uint16_t, v8hi, hi,
|
||||
__LD2_LANE_FUNC (uint16x4x2_t, uint16x4_t, uint16x8x2_t, uint16_t, v4hi, v8hi, hi,
|
||||
u16, int16x8_t)
|
||||
__LD2_LANE_FUNC (uint32x2x2_t, uint32x2_t, uint32x4x2_t, uint32_t, v4si, si,
|
||||
__LD2_LANE_FUNC (uint32x2x2_t, uint32x2_t, uint32x4x2_t, uint32_t, v2si, v4si, si,
|
||||
u32, int32x4_t)
|
||||
__LD2_LANE_FUNC (uint64x1x2_t, uint64x1_t, uint64x2x2_t, uint64_t, v2di, di,
|
||||
__LD2_LANE_FUNC (uint64x1x2_t, uint64x1_t, uint64x2x2_t, uint64_t, di, v2di, di,
|
||||
u64, int64x2_t)
|
||||
|
||||
#undef __LD2_LANE_FUNC
|
||||
|
|
@ -16884,8 +16902,8 @@ __LD2_LANE_FUNC (uint64x2x2_t, uint64x2_t, uint64_t, v2di, di, u64)
|
|||
|
||||
/* vld3_lane */
|
||||
|
||||
#define __LD3_LANE_FUNC(intype, vectype, largetype, ptrtype, \
|
||||
mode, ptrmode, funcsuffix, signedtype) \
|
||||
#define __LD3_LANE_FUNC(intype, vectype, largetype, ptrtype, mode, \
|
||||
qmode, ptrmode, funcsuffix, signedtype) \
|
||||
__extension__ static __inline intype __attribute__ ((__always_inline__)) \
|
||||
vld3_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c) \
|
||||
{ \
|
||||
|
|
@ -16897,15 +16915,15 @@ vld3_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c) \
|
|||
vcombine_##funcsuffix (__b.val[1], vcreate_##funcsuffix (0)); \
|
||||
__temp.val[2] = \
|
||||
vcombine_##funcsuffix (__b.val[2], vcreate_##funcsuffix (0)); \
|
||||
__o = __builtin_aarch64_set_qregci##mode (__o, \
|
||||
(signedtype) __temp.val[0], \
|
||||
0); \
|
||||
__o = __builtin_aarch64_set_qregci##mode (__o, \
|
||||
(signedtype) __temp.val[1], \
|
||||
1); \
|
||||
__o = __builtin_aarch64_set_qregci##mode (__o, \
|
||||
(signedtype) __temp.val[2], \
|
||||
2); \
|
||||
__o = __builtin_aarch64_set_qregci##qmode (__o, \
|
||||
(signedtype) __temp.val[0], \
|
||||
0); \
|
||||
__o = __builtin_aarch64_set_qregci##qmode (__o, \
|
||||
(signedtype) __temp.val[1], \
|
||||
1); \
|
||||
__o = __builtin_aarch64_set_qregci##qmode (__o, \
|
||||
(signedtype) __temp.val[2], \
|
||||
2); \
|
||||
__o = __builtin_aarch64_ld3_lane##mode ( \
|
||||
(__builtin_aarch64_simd_##ptrmode *) __ptr, __o, __c); \
|
||||
__b.val[0] = (vectype) __builtin_aarch64_get_dregcidi (__o, 0); \
|
||||
|
|
@ -16914,29 +16932,29 @@ vld3_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c) \
|
|||
return __b; \
|
||||
}
|
||||
|
||||
__LD3_LANE_FUNC (float32x2x3_t, float32x2_t, float32x4x3_t, float32_t, v4sf,
|
||||
__LD3_LANE_FUNC (float32x2x3_t, float32x2_t, float32x4x3_t, float32_t, v2sf, v4sf,
|
||||
sf, f32, float32x4_t)
|
||||
__LD3_LANE_FUNC (float64x1x3_t, float64x1_t, float64x2x3_t, float64_t, v2df,
|
||||
__LD3_LANE_FUNC (float64x1x3_t, float64x1_t, float64x2x3_t, float64_t, df, v2df,
|
||||
df, f64, float64x2_t)
|
||||
__LD3_LANE_FUNC (poly8x8x3_t, poly8x8_t, poly8x16x3_t, poly8_t, v16qi, qi, p8,
|
||||
__LD3_LANE_FUNC (poly8x8x3_t, poly8x8_t, poly8x16x3_t, poly8_t, v8qi, v16qi, qi, p8,
|
||||
int8x16_t)
|
||||
__LD3_LANE_FUNC (poly16x4x3_t, poly16x4_t, poly16x8x3_t, poly16_t, v8hi, hi,
|
||||
__LD3_LANE_FUNC (poly16x4x3_t, poly16x4_t, poly16x8x3_t, poly16_t, v4hi, v8hi, hi,
|
||||
p16, int16x8_t)
|
||||
__LD3_LANE_FUNC (int8x8x3_t, int8x8_t, int8x16x3_t, int8_t, v16qi, qi, s8,
|
||||
__LD3_LANE_FUNC (int8x8x3_t, int8x8_t, int8x16x3_t, int8_t, v8qi, v16qi, qi, s8,
|
||||
int8x16_t)
|
||||
__LD3_LANE_FUNC (int16x4x3_t, int16x4_t, int16x8x3_t, int16_t, v8hi, hi, s16,
|
||||
__LD3_LANE_FUNC (int16x4x3_t, int16x4_t, int16x8x3_t, int16_t, v4hi, v8hi, hi, s16,
|
||||
int16x8_t)
|
||||
__LD3_LANE_FUNC (int32x2x3_t, int32x2_t, int32x4x3_t, int32_t, v4si, si, s32,
|
||||
__LD3_LANE_FUNC (int32x2x3_t, int32x2_t, int32x4x3_t, int32_t, v2si, v4si, si, s32,
|
||||
int32x4_t)
|
||||
__LD3_LANE_FUNC (int64x1x3_t, int64x1_t, int64x2x3_t, int64_t, v2di, di, s64,
|
||||
__LD3_LANE_FUNC (int64x1x3_t, int64x1_t, int64x2x3_t, int64_t, di, v2di, di, s64,
|
||||
int64x2_t)
|
||||
__LD3_LANE_FUNC (uint8x8x3_t, uint8x8_t, uint8x16x3_t, uint8_t, v16qi, qi, u8,
|
||||
__LD3_LANE_FUNC (uint8x8x3_t, uint8x8_t, uint8x16x3_t, uint8_t, v8qi, v16qi, qi, u8,
|
||||
int8x16_t)
|
||||
__LD3_LANE_FUNC (uint16x4x3_t, uint16x4_t, uint16x8x3_t, uint16_t, v8hi, hi,
|
||||
__LD3_LANE_FUNC (uint16x4x3_t, uint16x4_t, uint16x8x3_t, uint16_t, v4hi, v8hi, hi,
|
||||
u16, int16x8_t)
|
||||
__LD3_LANE_FUNC (uint32x2x3_t, uint32x2_t, uint32x4x3_t, uint32_t, v4si, si,
|
||||
__LD3_LANE_FUNC (uint32x2x3_t, uint32x2_t, uint32x4x3_t, uint32_t, v2si, v4si, si,
|
||||
u32, int32x4_t)
|
||||
__LD3_LANE_FUNC (uint64x1x3_t, uint64x1_t, uint64x2x3_t, uint64_t, v2di, di,
|
||||
__LD3_LANE_FUNC (uint64x1x3_t, uint64x1_t, uint64x2x3_t, uint64_t, di, v2di, di,
|
||||
u64, int64x2_t)
|
||||
|
||||
#undef __LD3_LANE_FUNC
|
||||
|
|
@ -16977,8 +16995,8 @@ __LD3_LANE_FUNC (uint64x2x3_t, uint64x2_t, uint64_t, v2di, di, u64)
|
|||
|
||||
/* vld4_lane */
|
||||
|
||||
#define __LD4_LANE_FUNC(intype, vectype, largetype, ptrtype, \
|
||||
mode, ptrmode, funcsuffix, signedtype) \
|
||||
#define __LD4_LANE_FUNC(intype, vectype, largetype, ptrtype, mode, \
|
||||
qmode, ptrmode, funcsuffix, signedtype) \
|
||||
__extension__ static __inline intype __attribute__ ((__always_inline__)) \
|
||||
vld4_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c) \
|
||||
{ \
|
||||
|
|
@ -16992,18 +17010,18 @@ vld4_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c) \
|
|||
vcombine_##funcsuffix (__b.val[2], vcreate_##funcsuffix (0)); \
|
||||
__temp.val[3] = \
|
||||
vcombine_##funcsuffix (__b.val[3], vcreate_##funcsuffix (0)); \
|
||||
__o = __builtin_aarch64_set_qregxi##mode (__o, \
|
||||
(signedtype) __temp.val[0], \
|
||||
0); \
|
||||
__o = __builtin_aarch64_set_qregxi##mode (__o, \
|
||||
(signedtype) __temp.val[1], \
|
||||
1); \
|
||||
__o = __builtin_aarch64_set_qregxi##mode (__o, \
|
||||
(signedtype) __temp.val[2], \
|
||||
2); \
|
||||
__o = __builtin_aarch64_set_qregxi##mode (__o, \
|
||||
(signedtype) __temp.val[3], \
|
||||
3); \
|
||||
__o = __builtin_aarch64_set_qregxi##qmode (__o, \
|
||||
(signedtype) __temp.val[0], \
|
||||
0); \
|
||||
__o = __builtin_aarch64_set_qregxi##qmode (__o, \
|
||||
(signedtype) __temp.val[1], \
|
||||
1); \
|
||||
__o = __builtin_aarch64_set_qregxi##qmode (__o, \
|
||||
(signedtype) __temp.val[2], \
|
||||
2); \
|
||||
__o = __builtin_aarch64_set_qregxi##qmode (__o, \
|
||||
(signedtype) __temp.val[3], \
|
||||
3); \
|
||||
__o = __builtin_aarch64_ld4_lane##mode ( \
|
||||
(__builtin_aarch64_simd_##ptrmode *) __ptr, __o, __c); \
|
||||
__b.val[0] = (vectype) __builtin_aarch64_get_dregxidi (__o, 0); \
|
||||
|
|
@ -17015,29 +17033,29 @@ vld4_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c) \
|
|||
|
||||
/* vld4q_lane */
|
||||
|
||||
__LD4_LANE_FUNC (float32x2x4_t, float32x2_t, float32x4x4_t, float32_t, v4sf,
|
||||
__LD4_LANE_FUNC (float32x2x4_t, float32x2_t, float32x4x4_t, float32_t, v2sf, v4sf,
|
||||
sf, f32, float32x4_t)
|
||||
__LD4_LANE_FUNC (float64x1x4_t, float64x1_t, float64x2x4_t, float64_t, v2df,
|
||||
__LD4_LANE_FUNC (float64x1x4_t, float64x1_t, float64x2x4_t, float64_t, df, v2df,
|
||||
df, f64, float64x2_t)
|
||||
__LD4_LANE_FUNC (poly8x8x4_t, poly8x8_t, poly8x16x4_t, poly8_t, v16qi, qi, p8,
|
||||
__LD4_LANE_FUNC (poly8x8x4_t, poly8x8_t, poly8x16x4_t, poly8_t, v8qi, v16qi, qi, p8,
|
||||
int8x16_t)
|
||||
__LD4_LANE_FUNC (poly16x4x4_t, poly16x4_t, poly16x8x4_t, poly16_t, v8hi, hi,
|
||||
__LD4_LANE_FUNC (poly16x4x4_t, poly16x4_t, poly16x8x4_t, poly16_t, v4hi, v8hi, hi,
|
||||
p16, int16x8_t)
|
||||
__LD4_LANE_FUNC (int8x8x4_t, int8x8_t, int8x16x4_t, int8_t, v16qi, qi, s8,
|
||||
__LD4_LANE_FUNC (int8x8x4_t, int8x8_t, int8x16x4_t, int8_t, v8qi, v16qi, qi, s8,
|
||||
int8x16_t)
|
||||
__LD4_LANE_FUNC (int16x4x4_t, int16x4_t, int16x8x4_t, int16_t, v8hi, hi, s16,
|
||||
__LD4_LANE_FUNC (int16x4x4_t, int16x4_t, int16x8x4_t, int16_t, v4hi, v8hi, hi, s16,
|
||||
int16x8_t)
|
||||
__LD4_LANE_FUNC (int32x2x4_t, int32x2_t, int32x4x4_t, int32_t, v4si, si, s32,
|
||||
__LD4_LANE_FUNC (int32x2x4_t, int32x2_t, int32x4x4_t, int32_t, v2si, v4si, si, s32,
|
||||
int32x4_t)
|
||||
__LD4_LANE_FUNC (int64x1x4_t, int64x1_t, int64x2x4_t, int64_t, v2di, di, s64,
|
||||
__LD4_LANE_FUNC (int64x1x4_t, int64x1_t, int64x2x4_t, int64_t, di, v2di, di, s64,
|
||||
int64x2_t)
|
||||
__LD4_LANE_FUNC (uint8x8x4_t, uint8x8_t, uint8x16x4_t, uint8_t, v16qi, qi, u8,
|
||||
__LD4_LANE_FUNC (uint8x8x4_t, uint8x8_t, uint8x16x4_t, uint8_t, v8qi, v16qi, qi, u8,
|
||||
int8x16_t)
|
||||
__LD4_LANE_FUNC (uint16x4x4_t, uint16x4_t, uint16x8x4_t, uint16_t, v8hi, hi,
|
||||
__LD4_LANE_FUNC (uint16x4x4_t, uint16x4_t, uint16x8x4_t, uint16_t, v4hi, v8hi, hi,
|
||||
u16, int16x8_t)
|
||||
__LD4_LANE_FUNC (uint32x2x4_t, uint32x2_t, uint32x4x4_t, uint32_t, v4si, si,
|
||||
__LD4_LANE_FUNC (uint32x2x4_t, uint32x2_t, uint32x4x4_t, uint32_t, v2si, v4si, si,
|
||||
u32, int32x4_t)
|
||||
__LD4_LANE_FUNC (uint64x1x4_t, uint64x1_t, uint64x2x4_t, uint64_t, v2di, di,
|
||||
__LD4_LANE_FUNC (uint64x1x4_t, uint64x1_t, uint64x2x4_t, uint64_t, di, v2di, di,
|
||||
u64, int64x2_t)
|
||||
|
||||
#undef __LD4_LANE_FUNC
|
||||
|
|
|
|||
|
|
@ -1,3 +1,270 @@
|
|||
2015-07-22 Charles Baylis <charles.baylis@linaro.org>
|
||||
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c: New
|
||||
test.
|
||||
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c: New
|
||||
test.
|
||||
|
||||
2015-07-21 Paolo Carlini <paolo.carlini@oracle.com>
|
||||
|
||||
* g++.dg/template/crash81.C: Update.
|
||||
|
|
|
|||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
float32x2x2_t
|
||||
f_vld2_lane_f32 (float32_t * p, float32x2x2_t v)
|
||||
{
|
||||
float32x2x2_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_f32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_f32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
float64x1x2_t
|
||||
f_vld2_lane_f64 (float64_t * p, float64x1x2_t v)
|
||||
{
|
||||
float64x1x2_t res;
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_f64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_f64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
poly8x8x2_t
|
||||
f_vld2_lane_p8 (poly8_t * p, poly8x8x2_t v)
|
||||
{
|
||||
poly8x8x2_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_p8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_p8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int16x4x2_t
|
||||
f_vld2_lane_s16 (int16_t * p, int16x4x2_t v)
|
||||
{
|
||||
int16x4x2_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_s16 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_s16 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int32x2x2_t
|
||||
f_vld2_lane_s32 (int32_t * p, int32x2x2_t v)
|
||||
{
|
||||
int32x2x2_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_s32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_s32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
int64x1x2_t
|
||||
f_vld2_lane_s64 (int64_t * p, int64x1x2_t v)
|
||||
{
|
||||
int64x1x2_t res;
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_s64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_s64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int8x8x2_t
|
||||
f_vld2_lane_s8 (int8_t * p, int8x8x2_t v)
|
||||
{
|
||||
int8x8x2_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_s8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_s8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint16x4x2_t
|
||||
f_vld2_lane_u16 (uint16_t * p, uint16x4x2_t v)
|
||||
{
|
||||
uint16x4x2_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_u16 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_u16 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint32x2x2_t
|
||||
f_vld2_lane_u32 (uint32_t * p, uint32x2x2_t v)
|
||||
{
|
||||
uint32x2x2_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_u32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_u32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
uint64x1x2_t
|
||||
f_vld2_lane_u64 (uint64_t * p, uint64x1x2_t v)
|
||||
{
|
||||
uint64x1x2_t res;
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_u64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_u64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint8x8x2_t
|
||||
f_vld2_lane_u8 (uint8_t * p, uint8x8x2_t v)
|
||||
{
|
||||
uint8x8x2_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_u8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2_lane_u8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
float32x4x2_t
|
||||
f_vld2q_lane_f32 (float32_t * p, float32x4x2_t v)
|
||||
{
|
||||
float32x4x2_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_f32 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_f32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
float64x2x2_t
|
||||
f_vld2q_lane_f64 (float64_t * p, float64x2x2_t v)
|
||||
{
|
||||
float64x2x2_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_f64 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_f64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
poly8x16x2_t
|
||||
f_vld2q_lane_p8 (poly8_t * p, poly8x16x2_t v)
|
||||
{
|
||||
poly8x16x2_t res;
|
||||
/* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_p8 (p, v, 16);
|
||||
/* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_p8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int16x8x2_t
|
||||
f_vld2q_lane_s16 (int16_t * p, int16x8x2_t v)
|
||||
{
|
||||
int16x8x2_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_s16 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_s16 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int32x4x2_t
|
||||
f_vld2q_lane_s32 (int32_t * p, int32x4x2_t v)
|
||||
{
|
||||
int32x4x2_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_s32 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_s32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
int64x2x2_t
|
||||
f_vld2q_lane_s64 (int64_t * p, int64x2x2_t v)
|
||||
{
|
||||
int64x2x2_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_s64 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_s64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
int8x16x2_t
|
||||
f_vld2q_lane_s8 (int8_t * p, int8x16x2_t v)
|
||||
{
|
||||
int8x16x2_t res;
|
||||
/* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_s8 (p, v, 16);
|
||||
/* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_s8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint16x8x2_t
|
||||
f_vld2q_lane_u16 (uint16_t * p, uint16x8x2_t v)
|
||||
{
|
||||
uint16x8x2_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_u16 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_u16 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint32x4x2_t
|
||||
f_vld2q_lane_u32 (uint32_t * p, uint32x4x2_t v)
|
||||
{
|
||||
uint32x4x2_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_u32 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_u32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
uint64x2x2_t
|
||||
f_vld2q_lane_u64 (uint64_t * p, uint64x2x2_t v)
|
||||
{
|
||||
uint64x2x2_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_u64 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_u64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
uint8x16x2_t
|
||||
f_vld2q_lane_u8 (uint8_t * p, uint8x16x2_t v)
|
||||
{
|
||||
uint8x16x2_t res;
|
||||
/* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_u8 (p, v, 16);
|
||||
/* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld2q_lane_u8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
float32x2x3_t
|
||||
f_vld3_lane_f32 (float32_t * p, float32x2x3_t v)
|
||||
{
|
||||
float32x2x3_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_f32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_f32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
float64x1x3_t
|
||||
f_vld3_lane_f64 (float64_t * p, float64x1x3_t v)
|
||||
{
|
||||
float64x1x3_t res;
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_f64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_f64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
poly8x8x3_t
|
||||
f_vld3_lane_p8 (poly8_t * p, poly8x8x3_t v)
|
||||
{
|
||||
poly8x8x3_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_p8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_p8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int16x4x3_t
|
||||
f_vld3_lane_s16 (int16_t * p, int16x4x3_t v)
|
||||
{
|
||||
int16x4x3_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_s16 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_s16 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int32x2x3_t
|
||||
f_vld3_lane_s32 (int32_t * p, int32x2x3_t v)
|
||||
{
|
||||
int32x2x3_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_s32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_s32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
int64x1x3_t
|
||||
f_vld3_lane_s64 (int64_t * p, int64x1x3_t v)
|
||||
{
|
||||
int64x1x3_t res;
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_s64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_s64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int8x8x3_t
|
||||
f_vld3_lane_s8 (int8_t * p, int8x8x3_t v)
|
||||
{
|
||||
int8x8x3_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_s8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_s8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint16x4x3_t
|
||||
f_vld3_lane_u16 (uint16_t * p, uint16x4x3_t v)
|
||||
{
|
||||
uint16x4x3_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_u16 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_u16 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint32x2x3_t
|
||||
f_vld3_lane_u32 (uint32_t * p, uint32x2x3_t v)
|
||||
{
|
||||
uint32x2x3_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_u32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_u32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
uint64x1x3_t
|
||||
f_vld3_lane_u64 (uint64_t * p, uint64x1x3_t v)
|
||||
{
|
||||
uint64x1x3_t res;
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_u64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_u64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint8x8x3_t
|
||||
f_vld3_lane_u8 (uint8_t * p, uint8x8x3_t v)
|
||||
{
|
||||
uint8x8x3_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_u8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3_lane_u8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
float32x4x3_t
|
||||
f_vld3q_lane_f32 (float32_t * p, float32x4x3_t v)
|
||||
{
|
||||
float32x4x3_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_f32 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_f32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
float64x2x3_t
|
||||
f_vld3q_lane_f64 (float64_t * p, float64x2x3_t v)
|
||||
{
|
||||
float64x2x3_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_f64 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_f64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
poly8x16x3_t
|
||||
f_vld3q_lane_p8 (poly8_t * p, poly8x16x3_t v)
|
||||
{
|
||||
poly8x16x3_t res;
|
||||
/* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_p8 (p, v, 16);
|
||||
/* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_p8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int16x8x3_t
|
||||
f_vld3q_lane_s16 (int16_t * p, int16x8x3_t v)
|
||||
{
|
||||
int16x8x3_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_s16 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_s16 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int32x4x3_t
|
||||
f_vld3q_lane_s32 (int32_t * p, int32x4x3_t v)
|
||||
{
|
||||
int32x4x3_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_s32 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_s32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
int64x2x3_t
|
||||
f_vld3q_lane_s64 (int64_t * p, int64x2x3_t v)
|
||||
{
|
||||
int64x2x3_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_s64 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_s64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
int8x16x3_t
|
||||
f_vld3q_lane_s8 (int8_t * p, int8x16x3_t v)
|
||||
{
|
||||
int8x16x3_t res;
|
||||
/* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_s8 (p, v, 16);
|
||||
/* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_s8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint16x8x3_t
|
||||
f_vld3q_lane_u16 (uint16_t * p, uint16x8x3_t v)
|
||||
{
|
||||
uint16x8x3_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_u16 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_u16 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint32x4x3_t
|
||||
f_vld3q_lane_u32 (uint32_t * p, uint32x4x3_t v)
|
||||
{
|
||||
uint32x4x3_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_u32 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_u32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
uint64x2x3_t
|
||||
f_vld3q_lane_u64 (uint64_t * p, uint64x2x3_t v)
|
||||
{
|
||||
uint64x2x3_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_u64 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_u64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
uint8x16x3_t
|
||||
f_vld3q_lane_u8 (uint8_t * p, uint8x16x3_t v)
|
||||
{
|
||||
uint8x16x3_t res;
|
||||
/* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_u8 (p, v, 16);
|
||||
/* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld3q_lane_u8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
float32x2x4_t
|
||||
f_vld4_lane_f32 (float32_t * p, float32x2x4_t v)
|
||||
{
|
||||
float32x2x4_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_f32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_f32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
float64x1x4_t
|
||||
f_vld4_lane_f64 (float64_t * p, float64x1x4_t v)
|
||||
{
|
||||
float64x1x4_t res;
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_f64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_f64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
poly8x8x4_t
|
||||
f_vld4_lane_p8 (poly8_t * p, poly8x8x4_t v)
|
||||
{
|
||||
poly8x8x4_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_p8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_p8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int16x4x4_t
|
||||
f_vld4_lane_s16 (int16_t * p, int16x4x4_t v)
|
||||
{
|
||||
int16x4x4_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_s16 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_s16 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int32x2x4_t
|
||||
f_vld4_lane_s32 (int32_t * p, int32x2x4_t v)
|
||||
{
|
||||
int32x2x4_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_s32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_s32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
int64x1x4_t
|
||||
f_vld4_lane_s64 (int64_t * p, int64x1x4_t v)
|
||||
{
|
||||
int64x1x4_t res;
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_s64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_s64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int8x8x4_t
|
||||
f_vld4_lane_s8 (int8_t * p, int8x8x4_t v)
|
||||
{
|
||||
int8x8x4_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_s8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_s8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint16x4x4_t
|
||||
f_vld4_lane_u16 (uint16_t * p, uint16x4x4_t v)
|
||||
{
|
||||
uint16x4x4_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_u16 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_u16 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint32x2x4_t
|
||||
f_vld4_lane_u32 (uint32_t * p, uint32x2x4_t v)
|
||||
{
|
||||
uint32x2x4_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_u32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_u32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
uint64x1x4_t
|
||||
f_vld4_lane_u64 (uint64_t * p, uint64x1x4_t v)
|
||||
{
|
||||
uint64x1x4_t res;
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_u64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_u64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint8x8x4_t
|
||||
f_vld4_lane_u8 (uint8_t * p, uint8x8x4_t v)
|
||||
{
|
||||
uint8x8x4_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_u8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4_lane_u8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
float32x4x4_t
|
||||
f_vld4q_lane_f32 (float32_t * p, float32x4x4_t v)
|
||||
{
|
||||
float32x4x4_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_f32 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_f32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
float64x2x4_t
|
||||
f_vld4q_lane_f64 (float64_t * p, float64x2x4_t v)
|
||||
{
|
||||
float64x2x4_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_f64 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_f64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
poly8x16x4_t
|
||||
f_vld4q_lane_p8 (poly8_t * p, poly8x16x4_t v)
|
||||
{
|
||||
poly8x16x4_t res;
|
||||
/* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_p8 (p, v, 16);
|
||||
/* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_p8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int16x8x4_t
|
||||
f_vld4q_lane_s16 (int16_t * p, int16x8x4_t v)
|
||||
{
|
||||
int16x8x4_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_s16 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_s16 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
int32x4x4_t
|
||||
f_vld4q_lane_s32 (int32_t * p, int32x4x4_t v)
|
||||
{
|
||||
int32x4x4_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_s32 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_s32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
int64x2x4_t
|
||||
f_vld4q_lane_s64 (int64_t * p, int64x2x4_t v)
|
||||
{
|
||||
int64x2x4_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_s64 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_s64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
int8x16x4_t
|
||||
f_vld4q_lane_s8 (int8_t * p, int8x16x4_t v)
|
||||
{
|
||||
int8x16x4_t res;
|
||||
/* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_s8 (p, v, 16);
|
||||
/* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_s8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint16x8x4_t
|
||||
f_vld4q_lane_u16 (uint16_t * p, uint16x8x4_t v)
|
||||
{
|
||||
uint16x8x4_t res;
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_u16 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_u16 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
uint32x4x4_t
|
||||
f_vld4q_lane_u32 (uint32_t * p, uint32x4x4_t v)
|
||||
{
|
||||
uint32x4x4_t res;
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_u32 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_u32 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
uint64x2x4_t
|
||||
f_vld4q_lane_u64 (uint64_t * p, uint64x2x4_t v)
|
||||
{
|
||||
uint64x2x4_t res;
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_u64 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_u64 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
uint8x16x4_t
|
||||
f_vld4q_lane_u8 (uint8_t * p, uint8x16x4_t v)
|
||||
{
|
||||
uint8x16x4_t res;
|
||||
/* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_u8 (p, v, 16);
|
||||
/* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
res = vld4q_lane_u8 (p, v, -1);
|
||||
return res;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2_lane_f32 (float32_t * p, float32x2x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_f32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_f32 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2_lane_f64 (float64_t * p, float64x1x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_f64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_f64 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2_lane_p8 (poly8_t * p, poly8x8x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_p8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_p8 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2_lane_s16 (int16_t * p, int16x4x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_s16 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_s16 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2_lane_s32 (int32_t * p, int32x2x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_s32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_s32 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2_lane_s64 (int64_t * p, int64x1x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_s64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_s64 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2_lane_s8 (int8_t * p, int8x8x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_s8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_s8 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2_lane_u16 (uint16_t * p, uint16x4x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_u16 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_u16 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2_lane_u32 (uint32_t * p, uint32x2x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_u32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_u32 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2_lane_u64 (uint64_t * p, uint64x1x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_u64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_u64 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2_lane_u8 (uint8_t * p, uint8x8x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_u8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
vst2_lane_u8 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2q_lane_f32 (float32_t * p, float32x4x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_f32 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_f32 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2q_lane_f64 (float64_t * p, float64x2x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_f64 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_f64 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2q_lane_p8 (poly8_t * p, poly8x16x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_p8 (p, v, 16);
|
||||
/* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_p8 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2q_lane_s16 (int16_t * p, int16x8x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_s16 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_s16 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2q_lane_s32 (int32_t * p, int32x4x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_s32 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_s32 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2q_lane_s64 (int64_t * p, int64x2x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_s64 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_s64 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2q_lane_s8 (int8_t * p, int8x16x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_s8 (p, v, 16);
|
||||
/* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_s8 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2q_lane_u16 (uint16_t * p, uint16x8x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_u16 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_u16 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2q_lane_u32 (uint32_t * p, uint32x4x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_u32 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_u32 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2q_lane_u64 (uint64_t * p, uint64x2x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_u64 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_u64 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst2q_lane_u8 (uint8_t * p, uint8x16x2_t v)
|
||||
{
|
||||
/* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_u8 (p, v, 16);
|
||||
/* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
|
||||
vst2q_lane_u8 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst3_lane_f32 (float32_t * p, float32x2x3_t v)
|
||||
{
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst3_lane_f32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst3_lane_f32 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst3_lane_f64 (float64_t * p, float64x1x3_t v)
|
||||
{
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
vst3_lane_f64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
vst3_lane_f64 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst3_lane_p8 (poly8_t * p, poly8x8x3_t v)
|
||||
{
|
||||
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
vst3_lane_p8 (p, v, 8);
|
||||
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
|
||||
vst3_lane_p8 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst3_lane_s16 (int16_t * p, int16x4x3_t v)
|
||||
{
|
||||
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
vst3_lane_s16 (p, v, 4);
|
||||
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
|
||||
vst3_lane_s16 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst3_lane_s32 (int32_t * p, int32x2x3_t v)
|
||||
{
|
||||
/* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst3_lane_s32 (p, v, 2);
|
||||
/* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
|
||||
vst3_lane_s32 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include <arm_neon.h>
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-excess-errors "" { xfail arm*-*-* } } */
|
||||
/* { dg-skip-if "" { arm*-*-* } } */
|
||||
|
||||
void
|
||||
f_vst3_lane_s64 (int64_t * p, int64x1x3_t v)
|
||||
{
|
||||
/* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
vst3_lane_s64 (p, v, 1);
|
||||
/* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
|
||||
vst3_lane_s64 (p, v, -1);
|
||||
return;
|
||||
}
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue