diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 95b87a6a0bc..21b8e905eeb 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2019-06-14  Segher Boessenkool  <segher@kernel.crashing.org>
+
+	* config/rs6000/rs6000.md (CCEITHER): New define_mode_iterator.
+	(un): New define_mode_attr.
+	(isel_signed_<mode>, isel_unsigned_<mode>): Delete, merge into ...
+	(isel_<un>signed_<GPR:mode>): ... this.  New define_insn.
+	(isel_reversed_signed_<mode>, isel_reversed_unsigned_<mode>): Delete,
+	merge into ...
+	(isel_reversed_<un>signed_<GPR:mode>): ... this.  New define_insn.
+
 2019-06-14  Iain Sandoe  <iain@sandoe.co.uk>
 
 	* config/darwin.opt: Add RejectNegative where needed, reorder
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index b1f3bc3aac0..eb03e4d4c1e 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -5055,23 +5055,13 @@
 ;; leave out the mode in operand 4 and use one pattern, but reload can
 ;; change the mode underneath our feet and then gets confused trying
 ;; to reload the value.
-(define_insn "isel_signed_<mode>"
+(define_mode_iterator CCEITHER [CC CCUNS])
+(define_mode_attr un [(CC "") (CCUNS "un")])
+(define_insn "isel_<un>signed_<GPR:mode>"
   [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
 	(if_then_else:GPR
 	 (match_operator 1 "scc_comparison_operator"
-			 [(match_operand:CC 4 "cc_reg_operand" "y,y")
-			  (const_int 0)])
-	 (match_operand:GPR 2 "reg_or_zero_operand" "O,b")
-	 (match_operand:GPR 3 "gpc_reg_operand" "r,r")))]
-  "TARGET_ISEL"
-  "isel %0,%2,%3,%j1"
-  [(set_attr "type" "isel")])
-
-(define_insn "isel_unsigned_<mode>"
-  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
-	(if_then_else:GPR
-	 (match_operator 1 "scc_comparison_operator"
-			 [(match_operand:CCUNS 4 "cc_reg_operand" "y,y")
+			 [(match_operand:CCEITHER 4 "cc_reg_operand" "y,y")
 			  (const_int 0)])
 	 (match_operand:GPR 2 "reg_or_zero_operand" "O,b")
 	 (match_operand:GPR 3 "gpc_reg_operand" "r,r")))]
@@ -5083,26 +5073,11 @@
 ;; isel can handle reversed comparisons so long as the operands are
 ;; registers.
 
-(define_insn "*isel_reversed_signed_<mode>"
+(define_insn "*isel_reversed_<un>signed_<GPR:mode>"
   [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
 	(if_then_else:GPR
 	 (match_operator 1 "scc_rev_comparison_operator"
-			 [(match_operand:CC 4 "cc_reg_operand" "y,y")
-			  (const_int 0)])
-	 (match_operand:GPR 2 "gpc_reg_operand" "r,r")
-	 (match_operand:GPR 3 "reg_or_zero_operand" "O,b")))]
-  "TARGET_ISEL"
-{
-  PUT_CODE (operands[1], reverse_condition (GET_CODE (operands[1])));
-  return "isel %0,%3,%2,%j1";
-}
-  [(set_attr "type" "isel")])
-
-(define_insn "*isel_reversed_unsigned_<mode>"
-  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
-	(if_then_else:GPR
-	 (match_operator 1 "scc_rev_comparison_operator"
-			 [(match_operand:CCUNS 4 "cc_reg_operand" "y,y")
+			 [(match_operand:CCEITHER 4 "cc_reg_operand" "y,y")
 			  (const_int 0)])
 	 (match_operand:GPR 2 "gpc_reg_operand" "r,r")
 	 (match_operand:GPR 3 "reg_or_zero_operand" "O,b")))]