constraints.md (ZQ, ZR, ZS, ZT): New constraints.
2009-07-22 Andreas Krebbel <krebbel1@de.ibm.com>
* config/s390/constraints.md (ZQ, ZR, ZS, ZT): New constraints.
(U, W): Constraints are now deprecated and will be removed if we
run out of letters.
* config/s390/s390.md (U, W): Replaced with ZQZR, ZSZT throughout
the file.
("prefetch"): Add the stcmh instruction for prefetching.
* config/s390/s390.c (s390_symref_operand_p): Function moved. No
changes.
(s390_short_displacement): Return always true if compiling for
machines not providing the long displacement facility.
(s390_mem_constraint): Support the new constraint letter Z.
(s390_check_qrst_address): New function.
From-SVN: r149917
This commit is contained in:
Andreas Krebbel
Andreas Krebbel
parent
40b125d799
commit
4fe6dea8ff
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@ -1,3 +1,18 @@
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2009-07-22 Andreas Krebbel <krebbel1@de.ibm.com>
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* config/s390/constraints.md (ZQ, ZR, ZS, ZT): New constraints.
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(U, W): Constraints are now deprecated and will be removed if we
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run out of letters.
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* config/s390/s390.md (U, W): Replaced with ZQZR, ZSZT throughout
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the file.
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("prefetch"): Add the stcmh instruction for prefetching.
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* config/s390/s390.c (s390_symref_operand_p): Function moved. No
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changes.
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(s390_short_displacement): Return always true if compiling for
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machines not providing the long displacement facility.
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(s390_mem_constraint): Support the new constraint letter Z.
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(s390_check_qrst_address): New function.
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2009-07-21 DJ Delorie <dj@redhat.com>
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* config/mep/mep.c (mep_legitimize_arg): Leave control registers
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@ -66,9 +66,14 @@
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;; B -- Multiple letter constraint followed by Q, R, S, or T:
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;; Memory reference of the type specified by second letter that
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;; does *not* refer to a literal pool entry.
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;; U -- Pointer with short displacement.
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;; W -- Pointer with long displacement.
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;; U -- Pointer with short displacement. (deprecated - use ZQZR)
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;; W -- Pointer with long displacement. (deprecated - use ZSZT)
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;; Y -- Shift count operand.
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;; ZQ -- Pointer without index register and with short displacement.
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;; ZR -- Pointer with index register and short displacement.
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;; ZS -- Pointer without index register but with long displacement.
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;; ZT -- Pointer with index register and long displacement.
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;;
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;;
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@ -462,11 +467,26 @@ constraint."
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(define_address_constraint "U"
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"Pointer with short displacement"
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"Pointer with short displacement. (deprecated - use ZQZR)"
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(match_test "s390_mem_constraint (\"U\", op)"))
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(define_address_constraint "W"
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"Pointer with long displacement"
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"Pointer with long displacement. (deprecated - use ZSZT)"
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(match_test "s390_mem_constraint (\"W\", op)"))
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(define_address_constraint "ZQ"
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"Pointer without index register and with short displacement."
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(match_test "s390_mem_constraint (\"ZQ\", op)"))
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(define_address_constraint "ZR"
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"Pointer with index register and short displacement."
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(match_test "s390_mem_constraint (\"ZR\", op)"))
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(define_address_constraint "ZS"
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"Pointer without index register but with long displacement."
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(match_test "s390_mem_constraint (\"ZS\", op)"))
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(define_address_constraint "ZT"
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"Pointer with index register and long displacement."
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(match_test "s390_mem_constraint (\"ZT\", op)"))
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@ -1664,6 +1664,11 @@ s390_short_displacement (rtx disp)
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if (!disp)
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return true;
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/* Without the long displacement facility we don't need to
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distingiush between long and short displacement. */
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if (!TARGET_LONG_DISPLACEMENT)
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return true;
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/* Integer displacement in range. */
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if (GET_CODE (disp) == CONST_INT)
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return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
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@ -2032,132 +2037,168 @@ s390_legitimate_address_without_index_p (rtx op)
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}
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/* Evaluates constraint strings described by the regular expression
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([A|B](Q|R|S|T))|U|W and returns 1 if OP is a valid operand for the
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constraint given in STR, or 0 else. */
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/* Return true if ADDR is of kind symbol_ref or symbol_ref + const_int
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and return these parts in SYMREF and ADDEND. You can pass NULL in
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SYMREF and/or ADDEND if you are not interested in these values. */
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int
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s390_mem_constraint (const char *str, rtx op)
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static bool
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s390_symref_operand_p (rtx addr, rtx *symref, HOST_WIDE_INT *addend)
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{
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HOST_WIDE_INT tmpaddend = 0;
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if (GET_CODE (addr) == CONST)
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addr = XEXP (addr, 0);
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if (GET_CODE (addr) == PLUS)
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{
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if (GET_CODE (XEXP (addr, 0)) == SYMBOL_REF
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&& CONST_INT_P (XEXP (addr, 1)))
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{
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tmpaddend = INTVAL (XEXP (addr, 1));
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addr = XEXP (addr, 0);
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}
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else
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return false;
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}
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else
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if (GET_CODE (addr) != SYMBOL_REF)
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return false;
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if (symref)
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*symref = addr;
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if (addend)
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*addend = tmpaddend;
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return true;
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}
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/* Return true if the address in OP is valid for constraint letter C
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if wrapped in a MEM rtx. Set LIT_POOL_OK to true if it literal
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pool MEMs should be accepted. Only the Q, R, S, T constraint
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letters are allowed for C. */
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static int
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s390_check_qrst_address (char c, rtx op, bool lit_pool_ok)
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{
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struct s390_address addr;
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char c = str[0];
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bool decomposed = false;
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/* Check for offsettable variants of memory constraints. */
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if (c == 'A')
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/* This check makes sure that no symbolic address (except literal
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pool references) are accepted by the R or T constraints. */
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if (s390_symref_operand_p (op, NULL, NULL))
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{
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/* Only accept non-volatile MEMs. */
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if (!MEM_P (op) || MEM_VOLATILE_P (op))
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if (!lit_pool_ok)
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return 0;
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if ((reload_completed || reload_in_progress)
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? !offsettable_memref_p (op) : !offsettable_nonstrict_memref_p (op))
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if (!s390_decompose_address (op, &addr))
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return 0;
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c = str[1];
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}
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/* Check for non-literal-pool variants of memory constraints. */
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else if (c == 'B')
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{
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if (GET_CODE (op) != MEM)
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if (!addr.literal_pool)
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return 0;
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if (!s390_decompose_address (XEXP (op, 0), &addr))
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return 0;
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if (addr.literal_pool)
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return 0;
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c = str[1];
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decomposed = true;
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}
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switch (c)
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{
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case 'Q': /* no index short displacement */
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if (!decomposed && !s390_decompose_address (op, &addr))
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return 0;
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if (addr.indx)
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return 0;
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if (!s390_short_displacement (addr.disp))
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return 0;
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break;
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case 'R': /* with index short displacement */
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if (TARGET_LONG_DISPLACEMENT)
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{
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if (!decomposed && !s390_decompose_address (op, &addr))
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return 0;
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if (!s390_short_displacement (addr.disp))
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return 0;
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}
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/* Any invalid address here will be fixed up by reload,
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so accept it for the most generic constraint. */
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break;
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case 'S': /* no index long displacement */
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if (!TARGET_LONG_DISPLACEMENT)
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return 0;
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if (!decomposed && !s390_decompose_address (op, &addr))
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return 0;
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if (addr.indx)
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return 0;
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if (s390_short_displacement (addr.disp))
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return 0;
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break;
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case 'T': /* with index long displacement */
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if (!TARGET_LONG_DISPLACEMENT)
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return 0;
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/* Any invalid address here will be fixed up by reload,
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so accept it for the most generic constraint. */
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if ((decomposed || s390_decompose_address (op, &addr))
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&& s390_short_displacement (addr.disp))
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return 0;
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break;
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default:
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return 0;
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}
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return 1;
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}
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/* Evaluates constraint strings described by the regular expression
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([A|B|Z](Q|R|S|T))|U|W|Y and returns 1 if OP is a valid operand for
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the constraint given in STR, or 0 else. */
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int
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s390_mem_constraint (const char *str, rtx op)
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{
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char c = str[0];
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switch (c)
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{
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case 'A':
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/* Check for offsettable variants of memory constraints. */
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if (!MEM_P (op) || MEM_VOLATILE_P (op))
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return 0;
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if ((reload_completed || reload_in_progress)
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? !offsettable_memref_p (op) : !offsettable_nonstrict_memref_p (op))
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return 0;
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return s390_check_qrst_address (str[1], XEXP (op, 0), true);
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case 'B':
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/* Check for non-literal-pool variants of memory constraints. */
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if (!MEM_P (op))
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return 0;
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return s390_check_qrst_address (str[1], XEXP (op, 0), false);
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case 'Q':
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if (GET_CODE (op) != MEM)
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return 0;
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if (!s390_decompose_address (XEXP (op, 0), &addr))
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return 0;
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if (addr.indx)
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return 0;
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if (TARGET_LONG_DISPLACEMENT)
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{
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if (!s390_short_displacement (addr.disp))
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return 0;
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}
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break;
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case 'R':
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if (GET_CODE (op) != MEM)
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return 0;
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if (TARGET_LONG_DISPLACEMENT)
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{
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if (!s390_decompose_address (XEXP (op, 0), &addr))
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return 0;
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if (!s390_short_displacement (addr.disp))
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return 0;
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}
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break;
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case 'S':
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if (!TARGET_LONG_DISPLACEMENT)
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return 0;
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if (GET_CODE (op) != MEM)
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return 0;
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if (!s390_decompose_address (XEXP (op, 0), &addr))
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return 0;
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if (addr.indx)
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return 0;
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if (s390_short_displacement (addr.disp))
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return 0;
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break;
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case 'T':
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if (!TARGET_LONG_DISPLACEMENT)
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return 0;
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if (GET_CODE (op) != MEM)
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return 0;
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if (!s390_decompose_address (XEXP (op, 0), &addr))
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return 0;
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if (s390_short_displacement (addr.disp))
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return 0;
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break;
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return s390_check_qrst_address (c, XEXP (op, 0), true);
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case 'U':
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if (TARGET_LONG_DISPLACEMENT)
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{
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if (!s390_decompose_address (op, &addr))
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return 0;
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if (!s390_short_displacement (addr.disp))
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return 0;
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}
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break;
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return (s390_check_qrst_address ('Q', op, true)
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|| s390_check_qrst_address ('R', op, true));
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case 'W':
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if (!TARGET_LONG_DISPLACEMENT)
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return 0;
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if (!s390_decompose_address (op, &addr))
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return 0;
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if (s390_short_displacement (addr.disp))
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return 0;
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break;
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return (s390_check_qrst_address ('S', op, true)
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|| s390_check_qrst_address ('T', op, true));
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case 'Y':
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/* Simply check for the basic form of a shift count. Reload will
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take care of making sure we have a proper base register. */
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if (!s390_decompose_shift_count (op, NULL, NULL))
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return 0;
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break;
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case 'Z':
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return s390_check_qrst_address (str[1], op, true);
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default:
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return 0;
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}
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return 1;
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}
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/* Evaluates constraint strings starting with letter O. Input
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parameter C is the second letter following the "O" in the constraint
|
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string. Returns 1 if VALUE meets the respective constraint and 0
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@ -2775,41 +2816,6 @@ s390_preferred_reload_class (rtx op, enum reg_class rclass)
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return rclass;
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}
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/* Return true if ADDR is of kind symbol_ref or symbol_ref + const_int
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and return these parts in SYMREF and ADDEND. You can pass NULL in
|
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SYMREF and/or ADDEND if you are not interested in these values. */
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static bool
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s390_symref_operand_p (rtx addr, rtx *symref, HOST_WIDE_INT *addend)
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{
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HOST_WIDE_INT tmpaddend = 0;
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if (GET_CODE (addr) == CONST)
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addr = XEXP (addr, 0);
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if (GET_CODE (addr) == PLUS)
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{
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if (GET_CODE (XEXP (addr, 0)) == SYMBOL_REF
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&& CONST_INT_P (XEXP (addr, 1)))
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{
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tmpaddend = INTVAL (XEXP (addr, 1));
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addr = XEXP (addr, 0);
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}
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else
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return false;
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}
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else
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if (GET_CODE (addr) != SYMBOL_REF)
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return false;
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if (symref)
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*symref = addr;
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if (addend)
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*addend = tmpaddend;
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return true;
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}
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/* Return true if ADDR is SYMBOL_REF + addend with addend being a
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multiple of ALIGNMENT and the SYMBOL_REF being naturally
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aligned. */
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|
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@ -1440,7 +1440,7 @@
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(define_insn "*la_64"
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[(set (match_operand:DI 0 "register_operand" "=d,d")
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(match_operand:QI 1 "address_operand" "U,W"))]
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(match_operand:QI 1 "address_operand" "ZQZR,ZSZT"))]
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"TARGET_64BIT"
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"@
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la\t%0,%a1
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|
|
@ -1623,7 +1623,7 @@
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|
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(define_insn "*la_31"
|
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[(set (match_operand:SI 0 "register_operand" "=d,d")
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(match_operand:QI 1 "address_operand" "U,W"))]
|
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(match_operand:QI 1 "address_operand" "ZQZR,ZSZT"))]
|
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"!TARGET_64BIT && legitimate_la_operand_p (operands[1])"
|
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"@
|
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la\t%0,%a1
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|
|
@ -1658,7 +1658,7 @@
|
|||
|
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(define_insn "*la_31_and"
|
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[(set (match_operand:SI 0 "register_operand" "=d,d")
|
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(and:SI (match_operand:QI 1 "address_operand" "U,W")
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(and:SI (match_operand:QI 1 "address_operand" "ZQZR,ZSZT")
|
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(const_int 2147483647)))]
|
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"!TARGET_64BIT"
|
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"@
|
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|
|
@ -1684,7 +1684,7 @@
|
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|
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(define_insn "force_la_31"
|
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[(set (match_operand:SI 0 "register_operand" "=d,d")
|
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(match_operand:QI 1 "address_operand" "U,W"))
|
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(match_operand:QI 1 "address_operand" "ZQZR,ZSZT"))
|
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(use (const_int 0))]
|
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"!TARGET_64BIT"
|
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"@
|
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|
|
@ -7402,7 +7402,7 @@
|
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[(set (pc)
|
||||
(if_then_else
|
||||
(match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)])
|
||||
(match_operand 0 "address_operand" "U")
|
||||
(match_operand 0 "address_operand" "ZQZR")
|
||||
(pc)))]
|
||||
""
|
||||
{
|
||||
|
|
@ -7466,7 +7466,7 @@
|
|||
(if_then_else
|
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(match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)])
|
||||
(pc)
|
||||
(match_operand 0 "address_operand" "U")))]
|
||||
(match_operand 0 "address_operand" "ZQZR")))]
|
||||
""
|
||||
{
|
||||
if (get_attr_op_type (insn) == OP_TYPE_RR)
|
||||
|
|
@ -7673,7 +7673,7 @@
|
|||
(if_then_else
|
||||
(ne (match_operand:SI 1 "register_operand" "d")
|
||||
(const_int 1))
|
||||
(match_operand 0 "address_operand" "U")
|
||||
(match_operand 0 "address_operand" "ZQZR")
|
||||
(pc)))
|
||||
(set (match_operand:SI 2 "register_operand" "=1")
|
||||
(plus:SI (match_dup 1) (const_int -1)))
|
||||
|
|
@ -7784,7 +7784,7 @@
|
|||
;
|
||||
|
||||
(define_insn "indirect_jump"
|
||||
[(set (pc) (match_operand 0 "address_operand" "U"))]
|
||||
[(set (pc) (match_operand 0 "address_operand" "ZQZR"))]
|
||||
""
|
||||
{
|
||||
if (get_attr_op_type (insn) == OP_TYPE_RR)
|
||||
|
|
@ -7803,7 +7803,7 @@
|
|||
;
|
||||
|
||||
(define_insn "casesi_jump"
|
||||
[(set (pc) (match_operand 0 "address_operand" "U"))
|
||||
[(set (pc) (match_operand 0 "address_operand" "ZQZR"))
|
||||
(use (label_ref (match_operand 1 "" "")))]
|
||||
""
|
||||
{
|
||||
|
|
@ -8025,7 +8025,7 @@
|
|||
(set_attr "type" "jsr")])
|
||||
|
||||
(define_insn "*basr"
|
||||
[(call (mem:QI (match_operand 0 "address_operand" "U"))
|
||||
[(call (mem:QI (match_operand 0 "address_operand" "ZQZR"))
|
||||
(match_operand 1 "const_int_operand" "n"))
|
||||
(clobber (match_operand 2 "register_operand" "=r"))]
|
||||
"!SIBLING_CALL_P (insn) && GET_MODE (operands[2]) == Pmode"
|
||||
|
|
@ -8083,7 +8083,7 @@
|
|||
|
||||
(define_insn "*basr_r"
|
||||
[(set (match_operand 0 "" "")
|
||||
(call (mem:QI (match_operand 1 "address_operand" "U"))
|
||||
(call (mem:QI (match_operand 1 "address_operand" "ZQZR"))
|
||||
(match_operand 2 "const_int_operand" "n")))
|
||||
(clobber (match_operand 3 "register_operand" "=r"))]
|
||||
"!SIBLING_CALL_P (insn) && GET_MODE (operands[3]) == Pmode"
|
||||
|
|
@ -8183,7 +8183,7 @@
|
|||
|
||||
(define_insn "*basr_tls"
|
||||
[(set (match_operand 0 "" "")
|
||||
(call (mem:QI (match_operand 1 "address_operand" "U"))
|
||||
(call (mem:QI (match_operand 1 "address_operand" "ZQZR"))
|
||||
(match_operand 2 "const_int_operand" "n")))
|
||||
(clobber (match_operand 3 "register_operand" "=r"))
|
||||
(use (match_operand 4 "" ""))]
|
||||
|
|
@ -8709,27 +8709,32 @@
|
|||
;
|
||||
|
||||
(define_insn "prefetch"
|
||||
[(prefetch (match_operand 0 "address_operand" "UW,X")
|
||||
(match_operand:SI 1 "const_int_operand" "n,n")
|
||||
(match_operand:SI 2 "const_int_operand" "n,n"))]
|
||||
"TARGET_Z10"
|
||||
[(prefetch (match_operand 0 "address_operand" "ZQZS,ZRZT,X")
|
||||
(match_operand:SI 1 "const_int_operand" " n, n,n")
|
||||
(match_operand:SI 2 "const_int_operand" " n, n,n"))]
|
||||
"TARGET_ZARCH && s390_tune == PROCESSOR_2097_Z10"
|
||||
{
|
||||
if (larl_operand (operands[0], Pmode))
|
||||
return INTVAL (operands[1]) == 1 ? "pfdrl\t2,%a0" : "pfdrl\t1,%a0";
|
||||
switch (which_alternative)
|
||||
{
|
||||
case 0:
|
||||
return INTVAL (operands[1]) == 1 ? "stcmh\t2,0,%a0" : "stcmh\t1,0,%a0";
|
||||
case 1:
|
||||
return INTVAL (operands[1]) == 1 ? "pfd\t2,%a0" : "pfd\t1,%a0";
|
||||
case 2:
|
||||
if (larl_operand (operands[0], Pmode))
|
||||
return INTVAL (operands[1]) == 1 ? "pfdrl\t2,%a0" : "pfdrl\t1,%a0";
|
||||
default:
|
||||
|
||||
if (s390_mem_constraint ("W", operands[0])
|
||||
|| s390_mem_constraint ("U", operands[0]))
|
||||
return INTVAL (operands[1]) == 1 ? "pfd\t2,%a0" : "pfd\t1,%a0";
|
||||
/* This might be reached for symbolic operands with an odd
|
||||
addend. We simply omit the prefetch for such rare cases. */
|
||||
|
||||
/* This point might be reached if op0 is a larl operand with an
|
||||
uneven addend. In this case we simply omit issuing a prefetch
|
||||
instruction. */
|
||||
|
||||
return "";
|
||||
return "";
|
||||
}
|
||||
}
|
||||
[(set_attr "type" "load,larl")
|
||||
(set_attr "op_type" "RXY,RIL")
|
||||
(set_attr "z10prop" "z10_super")])
|
||||
[(set_attr "type" "store,load,larl")
|
||||
(set_attr "op_type" "RSY,RXY,RIL")
|
||||
(set_attr "z10prop" "z10_super")
|
||||
(set_attr "cpu_facility" "*,z10,z10")])
|
||||
|
||||
|
||||
;
|
||||
|
|
|
|||
Loading…
Reference in New Issue