gcc/
2015-06-12 Venkataramanan Kumar <venkataramanan.kumar@amd.com>
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_MWAITX_SET): New.
(ix86_handle_option): Handle mwaitx.
* config.gcc (i[34567]86-*-*): Add mwaitxintrin.h,
(x86_64-*-*): Likewise.
* config/i386/mwaitxintrin.h: New header.
* config/i386/cpuid.h (bit_MWAITX): Define.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
MWAITX support.
* config/i386/i386.opt (mwaitx): New.
* config/i386/i386-builtin-types.def
(VOID_FTYPE_UNSIGNED_ UNSIGNED_UNSIGNED): New function type.
* config/i386/i386-c.c: Define __MWAITX__ if needed.
* config/i386/i386.c (ix86_target_string): Define -mmwaitx option.
(PTA_MWAITX): New.
(ix86_option_override_internal): Handle new option.
(processor_alias_table): Added PTA_MWAITX.
(ix86_valid_target_attribute_inner_p): Add OPT_mmwaitx.
(ix86_builtins): Add IX86_BUILTIN_MWAITX, IX86_BUILTIN_MONITORX.
(ix86_expand_builtin): Handle IX86_BUILTIN_MWAITX and
IX86_BUILTIN_MONITORX built-ins.
* config/i386/i386.h (TARGET_MWAITX): New.
* config/i386/i386.md (unspecv): Add UNSPEC_MWAITX and
UNSPEC_MONITORX.
(mwaitx): New pattern.
(monitorx_<mode>): New pattern.
* config/i386/x86intrin.h: Include mwaitxintrin.h.
* doc/extend.texi: Document monitorx and mwaitx builtins.
* doc/invoke.texi: Document -mmwaitx option.
gcc/testsuite
2015-06-12 Venkataramanan Kumar <venkataramanan.kumar@amd.com>
* gcc.target/i386/monitorx.c: New.
* gcc.target/i386/sse-12.c: Add -mmwaitx.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
From-SVN: r224414
This commit is contained in:
Venkataramanan Kumar
Venkataramanan Kumar
parent
1c6682fa9f
commit
500a08b263
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@ -1,3 +1,35 @@
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2015-06-12 Venkataramanan Kumar <venkataramanan.kumar@amd.com>
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* common/config/i386/i386-common.c
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(OPTION_MASK_ISA_MWAITX_SET): New.
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(ix86_handle_option): Handle mwaitx.
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* config.gcc (i[34567]86-*-*): Add mwaitxintrin.h,
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(x86_64-*-*): Likewise.
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* config/i386/mwaitxintrin.h: New header.
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* config/i386/cpuid.h (bit_MWAITX): Define.
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* config/i386/driver-i386.c (host_detect_local_cpu): Detect
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MWAITX support.
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* config/i386/i386.opt (mwaitx): New.
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* config/i386/i386-builtin-types.def
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(VOID_FTYPE_UNSIGNED_ UNSIGNED_UNSIGNED): New function type.
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* config/i386/i386-c.c: Define __MWAITX__ if needed.
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* config/i386/i386.c (ix86_target_string): Define -mmwaitx option.
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(PTA_MWAITX): New.
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(ix86_option_override_internal): Handle new option.
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(processor_alias_table): Added PTA_MWAITX.
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(ix86_valid_target_attribute_inner_p): Add OPT_mmwaitx.
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(ix86_builtins): Add IX86_BUILTIN_MWAITX, IX86_BUILTIN_MONITORX.
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(ix86_expand_builtin): Handle IX86_BUILTIN_MWAITX and
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IX86_BUILTIN_MONITORX built-ins.
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* config/i386/i386.h (TARGET_MWAITX): New.
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* config/i386/i386.md (unspecv): Add UNSPEC_MWAITX and
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UNSPEC_MONITORX.
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(mwaitx): New pattern.
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(monitorx_<mode>): New pattern.
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* config/i386/x86intrin.h: Include mwaitxintrin.h.
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* doc/extend.texi: Document monitorx and mwaitx builtins.
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* doc/invoke.texi: Document -mmwaitx option.
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2015-06-12 Uros Bizjak <ubizjak@gmail.com>
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* emit-rtl.c (need_atomic_barrier_p): Mask model with
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@ -127,6 +127,7 @@ along with GCC; see the file COPYING3. If not see
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#define OPTION_MASK_ISA_RDRND_SET OPTION_MASK_ISA_RDRND
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#define OPTION_MASK_ISA_F16C_SET \
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(OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET)
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#define OPTION_MASK_ISA_MWAITX_SET OPTION_MASK_ISA_MWAITX
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/* Define a set of ISAs which aren't available when a given ISA is
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disabled. MMX and SSE ISAs are handled separately. */
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@ -186,6 +187,7 @@ along with GCC; see the file COPYING3. If not see
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#define OPTION_MASK_ISA_XSAVES_UNSET OPTION_MASK_ISA_XSAVES
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#define OPTION_MASK_ISA_PCOMMIT_UNSET OPTION_MASK_ISA_PCOMMIT
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#define OPTION_MASK_ISA_CLWB_UNSET OPTION_MASK_ISA_CLWB
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#define OPTION_MASK_ISA_MWAITX_UNSET OPTION_MASK_ISA_MWAITX
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/* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same
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as -mno-sse4.1. */
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@ -932,6 +934,19 @@ ix86_handle_option (struct gcc_options *opts,
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}
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return true;
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case OPT_mmwaitx:
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if (value)
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{
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MWAITX_SET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MWAITX_SET;
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}
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else
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{
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opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MWAITX_UNSET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MWAITX_UNSET;
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}
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return true;
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/* Comes from final.c -- no real reason to change it. */
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#define MAX_CODE_ALIGN 16
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@ -370,7 +370,7 @@ i[34567]86-*-*)
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xsavesintrin.h avx512dqintrin.h avx512bwintrin.h
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avx512vlintrin.h avx512vlbwintrin.h avx512vldqintrin.h
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avx512ifmaintrin.h avx512ifmavlintrin.h avx512vbmiintrin.h
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avx512vbmivlintrin.h clwbintrin.h pcommitintrin.h"
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avx512vbmivlintrin.h clwbintrin.h pcommitintrin.h mwaitxintrin.h"
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;;
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x86_64-*-*)
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cpu_type=i386
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@ -391,7 +391,7 @@ x86_64-*-*)
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xsavesintrin.h avx512dqintrin.h avx512bwintrin.h
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avx512vlintrin.h avx512vlbwintrin.h avx512vldqintrin.h
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avx512ifmaintrin.h avx512ifmavlintrin.h avx512vbmiintrin.h
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avx512vbmivlintrin.h clwbintrin.h pcommitintrin.h"
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avx512vbmivlintrin.h clwbintrin.h pcommitintrin.h mwaitxintrin.h"
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;;
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ia64-*-*)
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extra_headers=ia64intrin.h
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@ -57,6 +57,7 @@
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#define bit_LWP (1 << 15)
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#define bit_FMA4 (1 << 16)
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#define bit_TBM (1 << 21)
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#define bit_MWAITX (1 << 29)
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/* %edx */
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#define bit_MMXEXT (1 << 22)
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@ -413,7 +413,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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unsigned int has_clflushopt = 0, has_xsavec = 0, has_xsaves = 0;
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unsigned int has_avx512dq = 0, has_avx512bw = 0, has_avx512vl = 0;
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unsigned int has_avx512vbmi = 0, has_avx512ifma = 0, has_clwb = 0;
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unsigned int has_pcommit = 0;
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unsigned int has_pcommit = 0, has_mwaitx = 0;
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bool arch;
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@ -532,6 +532,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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has_longmode = edx & bit_LM;
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has_3dnowp = edx & bit_3DNOWP;
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has_3dnow = edx & bit_3DNOW;
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has_mwaitx = ecx & bit_MWAITX;
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}
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/* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv. */
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@ -953,6 +954,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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const char *avx512vbmi = has_avx512vbmi ? " -mavx512vbmi" : " -mno-avx512vbmi";
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const char *clwb = has_clwb ? " -mclwb" : " -mno-clwb";
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const char *pcommit = has_pcommit ? " -mpcommit" : " -mno-pcommit";
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const char *mwaitx = has_mwaitx ? " -mmwaitx" : " -mno-mwaitx";
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options = concat (options, mmx, mmx3dnow, sse, sse2, sse3, ssse3,
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sse4a, cx16, sahf, movbe, aes, sha, pclmul,
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@ -962,7 +964,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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fxsr, xsave, xsaveopt, avx512f, avx512er,
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avx512cd, avx512pf, prefetchwt1, clflushopt,
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xsavec, xsaves, avx512dq, avx512bw, avx512vl,
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avx512ifma, avx512vbmi, clwb, pcommit, NULL);
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avx512ifma, avx512vbmi, clwb, pcommit, mwaitx, NULL);
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}
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done:
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@ -595,6 +595,7 @@ DEF_FUNCTION_TYPE (VOID, PV4DI, V4DI)
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DEF_FUNCTION_TYPE (VOID, PV4SF, V4SF)
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DEF_FUNCTION_TYPE (VOID, PV8SF, V8SF)
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DEF_FUNCTION_TYPE (VOID, UNSIGNED, UNSIGNED)
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DEF_FUNCTION_TYPE (VOID, UNSIGNED, UNSIGNED, UNSIGNED)
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DEF_FUNCTION_TYPE (VOID, PV8DI, V8DI)
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# Instructions returning mask
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@ -425,6 +425,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
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def_or_undef (parse_in, "__PCOMMIT__");
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if (isa_flag & OPTION_MASK_ISA_CLWB)
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def_or_undef (parse_in, "__CLWB__");
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if (isa_flag & OPTION_MASK_ISA_MWAITX)
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def_or_undef (parse_in, "__MWAITX__");
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}
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@ -2361,6 +2361,7 @@ static rtx (*ix86_gen_sub3) (rtx, rtx, rtx);
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static rtx (*ix86_gen_sub3_carry) (rtx, rtx, rtx, rtx, rtx);
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static rtx (*ix86_gen_one_cmpl2) (rtx, rtx);
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static rtx (*ix86_gen_monitor) (rtx, rtx, rtx);
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static rtx (*ix86_gen_monitorx) (rtx, rtx, rtx);
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static rtx (*ix86_gen_andsp) (rtx, rtx, rtx);
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static rtx (*ix86_gen_allocate_stack_worker) (rtx, rtx);
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static rtx (*ix86_gen_adjust_stack_and_probe) (rtx, rtx, rtx);
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@ -2664,6 +2665,7 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch,
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{ "-mmpx", OPTION_MASK_ISA_MPX },
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{ "-mclwb", OPTION_MASK_ISA_CLWB },
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{ "-mpcommit", OPTION_MASK_ISA_PCOMMIT },
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{ "-mmwaitx", OPTION_MASK_ISA_MWAITX },
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};
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/* Flag options. */
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@ -3206,6 +3208,7 @@ ix86_option_override_internal (bool main_args_p,
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#define PTA_AVX512VBMI (HOST_WIDE_INT_1 << 54)
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#define PTA_CLWB (HOST_WIDE_INT_1 << 55)
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#define PTA_PCOMMIT (HOST_WIDE_INT_1 << 56)
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#define PTA_MWAITX (HOST_WIDE_INT_1 << 57)
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#define PTA_CORE2 \
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(PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 \
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@ -3359,7 +3362,7 @@ ix86_option_override_internal (bool main_args_p,
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| PTA_FMA4 | PTA_XOP | PTA_LWP | PTA_BMI | PTA_BMI2
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| PTA_TBM | PTA_F16C | PTA_FMA | PTA_PRFCHW | PTA_FXSR
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| PTA_XSAVE | PTA_XSAVEOPT | PTA_FSGSBASE | PTA_RDRND
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| PTA_MOVBE},
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| PTA_MOVBE | PTA_MWAITX},
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{"btver1", PROCESSOR_BTVER1, CPU_GENERIC,
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PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
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| PTA_SSSE3 | PTA_SSE4A |PTA_ABM | PTA_CX16 | PTA_PRFCHW
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@ -3803,6 +3806,9 @@ ix86_option_override_internal (bool main_args_p,
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512IFMA;
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if (processor_alias_table[i].flags & (PTA_PREFETCH_SSE | PTA_SSE))
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x86_prefetch_sse = true;
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if (processor_alias_table[i].flags & PTA_MWAITX
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&& !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_MWAITX))
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MWAITX;
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break;
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}
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@ -4221,6 +4227,7 @@ ix86_option_override_internal (bool main_args_p,
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ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probedi;
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ix86_gen_probe_stack_range = gen_probe_stack_rangedi;
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ix86_gen_monitor = gen_sse3_monitor_di;
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ix86_gen_monitorx = gen_monitorx_di;
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}
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else
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{
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@ -4233,6 +4240,7 @@ ix86_option_override_internal (bool main_args_p,
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ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probesi;
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ix86_gen_probe_stack_range = gen_probe_stack_rangesi;
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ix86_gen_monitor = gen_sse3_monitor_si;
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ix86_gen_monitorx = gen_monitorx_si;
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}
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#ifdef USE_IX86_CLD
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@ -4757,6 +4765,7 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[],
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IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
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IX86_ATTR_ISA ("clwb", OPT_mclwb),
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IX86_ATTR_ISA ("pcommit", OPT_mpcommit),
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IX86_ATTR_ISA ("mwaitx", OPT_mmwaitx),
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/* enum options */
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IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_),
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@ -30570,6 +30579,10 @@ enum ix86_builtins
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IX86_BUILTIN_CVTPS2PH,
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IX86_BUILTIN_CVTPS2PH256,
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/* MONITORX and MWAITX instrucions. */
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IX86_BUILTIN_MONITORX,
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IX86_BUILTIN_MWAITX,
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/* CFString built-in for darwin */
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IX86_BUILTIN_CFSTRING,
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@ -34188,6 +34201,12 @@ ix86_init_mmx_sse_builtins (void)
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def_builtin (OPTION_MASK_ISA_CLWB, "__builtin_ia32_clwb",
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VOID_FTYPE_PCVOID, IX86_BUILTIN_CLWB);
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/* MONITORX and MWAITX. */
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def_builtin (OPTION_MASK_ISA_MWAITX, "__builtin_ia32_monitorx",
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VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITORX);
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def_builtin (OPTION_MASK_ISA_MWAITX, "__builtin_ia32_mwaitx",
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VOID_FTYPE_UNSIGNED_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAITX);
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/* Add FMA4 multi-arg argument instructions */
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for (i = 0, d = bdesc_multi_arg; i < ARRAY_SIZE (bdesc_multi_arg); i++, d++)
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{
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@ -38956,6 +38975,7 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
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return 0;
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case IX86_BUILTIN_MONITOR:
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case IX86_BUILTIN_MONITORX:
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arg0 = CALL_EXPR_ARG (exp, 0);
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arg1 = CALL_EXPR_ARG (exp, 1);
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arg2 = CALL_EXPR_ARG (exp, 2);
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@ -38968,7 +38988,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
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op1 = copy_to_mode_reg (SImode, op1);
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if (!REG_P (op2))
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op2 = copy_to_mode_reg (SImode, op2);
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emit_insn (ix86_gen_monitor (op0, op1, op2));
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emit_insn (fcode == IX86_BUILTIN_MONITOR
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? ix86_gen_monitor (op0, op1, op2)
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: ix86_gen_monitorx (op0, op1, op2));
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return 0;
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case IX86_BUILTIN_MWAIT:
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@ -38983,6 +39006,22 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
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emit_insn (gen_sse3_mwait (op0, op1));
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return 0;
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case IX86_BUILTIN_MWAITX:
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arg0 = CALL_EXPR_ARG (exp, 0);
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arg1 = CALL_EXPR_ARG (exp, 1);
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arg2 = CALL_EXPR_ARG (exp, 2);
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op0 = expand_normal (arg0);
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op1 = expand_normal (arg1);
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op2 = expand_normal (arg2);
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if (!REG_P (op0))
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op0 = copy_to_mode_reg (SImode, op0);
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if (!REG_P (op1))
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op1 = copy_to_mode_reg (SImode, op1);
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if (!REG_P (op2))
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op2 = copy_to_mode_reg (SImode, op2);
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emit_insn (gen_mwaitx (op0, op1, op2));
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return 0;
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case IX86_BUILTIN_VEC_INIT_V2SI:
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case IX86_BUILTIN_VEC_INIT_V4HI:
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case IX86_BUILTIN_VEC_INIT_V8QI:
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|
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@ -154,6 +154,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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#define TARGET_PCOMMIT_P(x) TARGET_ISA_PCOMMIT_P(x)
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#define TARGET_CLWB TARGET_ISA_CLWB
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#define TARGET_CLWB_P(x) TARGET_ISA_CLWB_P(x)
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#define TARGET_MWAITX TARGET_ISA_MWAITX
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#define TARGET_MWAITX_P(x) TARGET_ISA_MWAITX_P(x)
|
||||
|
||||
#define TARGET_LP64 TARGET_ABI_64
|
||||
#define TARGET_LP64_P(x) TARGET_ABI_64_P(x)
|
||||
|
|
|
|||
|
|
@ -261,6 +261,11 @@
|
|||
|
||||
;; For CLFLUSHOPT support
|
||||
UNSPECV_CLFLUSHOPT
|
||||
|
||||
;; For MONITORX and MWAITX support
|
||||
UNSPECV_MONITORX
|
||||
UNSPECV_MWAITX
|
||||
|
||||
])
|
||||
|
||||
;; Constants to represent rounding modes in the ROUND instruction
|
||||
|
|
@ -18848,6 +18853,32 @@
|
|||
(set_attr "atom_sse_attr" "fence")
|
||||
(set_attr "memory" "unknown")])
|
||||
|
||||
;; MONITORX and MWAITX
|
||||
(define_insn "mwaitx"
|
||||
[(unspec_volatile [(match_operand:SI 0 "register_operand" "c")
|
||||
(match_operand:SI 1 "register_operand" "a")
|
||||
(match_operand:SI 2 "register_operand" "b")]
|
||||
UNSPECV_MWAITX)]
|
||||
"TARGET_MWAITX"
|
||||
;; 64bit version is "mwaitx %rax,%rcx,%rbx". But only lower 32bits are used.
|
||||
;; Since 32bit register operands are implicitly zero extended to 64bit,
|
||||
;; we only need to set up 32bit registers.
|
||||
"mwaitx"
|
||||
[(set_attr "length" "3")])
|
||||
|
||||
(define_insn "monitorx_<mode>"
|
||||
[(unspec_volatile [(match_operand:P 0 "register_operand" "a")
|
||||
(match_operand:SI 1 "register_operand" "c")
|
||||
(match_operand:SI 2 "register_operand" "d")]
|
||||
UNSPECV_MONITORX)]
|
||||
"TARGET_MWAITX"
|
||||
;; 64bit version is "monitorx %rax,%rcx,%rdx". But only lower 32bits in
|
||||
;; RCX and RDX are used. Since 32bit register operands are implicitly
|
||||
;; zero extended to 64bit, we only need to set up 32bit registers.
|
||||
"%^monitorx"
|
||||
[(set (attr "length")
|
||||
(symbol_ref ("(Pmode != word_mode) + 3")))])
|
||||
|
||||
;; MPX instructions
|
||||
|
||||
(define_expand "<mode>_mk"
|
||||
|
|
|
|||
|
|
@ -859,6 +859,10 @@ mmpx
|
|||
Target Report Mask(ISA_MPX) Var(ix86_isa_flags) Save
|
||||
Support MPX code generation
|
||||
|
||||
mmwaitx
|
||||
Target Report Mask(ISA_MWAITX) Var(ix86_isa_flags) Save
|
||||
Support MWAITX and MONITORX built-in functions and code generation
|
||||
|
||||
mstack-protector-guard=
|
||||
Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS)
|
||||
Use given stack-protector guard
|
||||
|
|
|
|||
|
|
@ -0,0 +1,50 @@
|
|||
/* Copyright (C) 2012-2015 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of GCC.
|
||||
|
||||
GCC is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3, or (at your option)
|
||||
any later version.
|
||||
|
||||
GCC is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
Under Section 7 of GPL version 3, you are granted additional
|
||||
permissions described in the GCC Runtime Library Exception, version
|
||||
3.1, as published by the Free Software Foundation.
|
||||
|
||||
You should have received a copy of the GNU General Public License and
|
||||
a copy of the GCC Runtime Library Exception along with this program;
|
||||
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
|
||||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
#ifndef _MWAITXINTRIN_H_INCLUDED
|
||||
#define _MWAITXINTRIN_H_INCLUDED
|
||||
|
||||
#ifndef __MWAITX__
|
||||
#pragma GCC push_options
|
||||
#pragma GCC target("mwaitx")
|
||||
#define __DISABLE_MWAITX__
|
||||
#endif /* __MWAITX__ */
|
||||
|
||||
extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm_monitorx (void const * __P, unsigned int __E, unsigned int __H)
|
||||
{
|
||||
__builtin_ia32_monitorx (__P, __E, __H);
|
||||
}
|
||||
|
||||
extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm_mwaitx (unsigned int __E, unsigned int __H, unsigned int __C)
|
||||
{
|
||||
__builtin_ia32_mwaitx (__E, __H, __C);
|
||||
}
|
||||
|
||||
#ifdef __DISABLE_MWAITX__
|
||||
#undef __DISABLE_MWAITX__
|
||||
#pragma GCC pop_options
|
||||
#endif /* __DISABLE_MWAITX__ */
|
||||
|
||||
#endif /* _MWAITXINTRIN_H_INCLUDED */
|
||||
|
|
@ -85,4 +85,5 @@
|
|||
|
||||
#include <xsavecintrin.h>
|
||||
|
||||
#include <mwaitxintrin.h>
|
||||
#endif /* _X86INTRIN_H_INCLUDED */
|
||||
|
|
|
|||
|
|
@ -17919,6 +17919,13 @@ void __builtin_ia32_xabort (status)
|
|||
int __builtin_ia32_xtest ()
|
||||
@end smallexample
|
||||
|
||||
The following built-in functions are available when @option{-mmwaitx} is used.
|
||||
All of them generate the machine instruction that is part of the name.
|
||||
@smallexample
|
||||
void __builtin_ia32_monitorx (void *, unsigned int, unsigned int)
|
||||
void __builtin_ia32_mwaitx (unsigned int, unsigned int, unsigned int)
|
||||
@end smallexample
|
||||
|
||||
@node x86 transactional memory intrinsics
|
||||
@subsection x86 Transactional Memory Intrinsics
|
||||
|
||||
|
|
|
|||
|
|
@ -1085,7 +1085,7 @@ See RS/6000 and PowerPC Options.
|
|||
-maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma -mprefetchwt1 @gol
|
||||
-mclflushopt -mxsavec -mxsaves @gol
|
||||
-msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlzcnt @gol
|
||||
-mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx -mthreads @gol
|
||||
-mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx -mmwaitx -mthreads @gol
|
||||
-mno-align-stringops -minline-all-stringops @gol
|
||||
-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
|
||||
-mmemcpy-strategy=@var{strategy} -mmemset-strategy=@var{strategy} @gol
|
||||
|
|
@ -22876,10 +22876,13 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
|
|||
@need 200
|
||||
@itemx -mmpx
|
||||
@opindex mmpx
|
||||
@need 200
|
||||
@itemx -mmwaitx
|
||||
@opindex mmwaitx
|
||||
These switches enable the use of instructions in the MMX, SSE,
|
||||
SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AVX512F, AVX512PF, AVX512ER, AVX512CD,
|
||||
SHA, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA, SSE4A, FMA4, XOP, LWP, ABM,
|
||||
BMI, BMI2, FXSR, XSAVE, XSAVEOPT, LZCNT, RTM, MPX or 3DNow!@:
|
||||
BMI, BMI2, FXSR, XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX or 3DNow!@:
|
||||
extended instruction sets. Each has a corresponding @option{-mno-} option
|
||||
to disable use of these instructions.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,14 @@
|
|||
2015-06-12 Venkataramanan Kumar <venkataramanan.kumar@amd.com>
|
||||
|
||||
* gcc.target/i386/monitorx.c: New.
|
||||
* gcc.target/i386/sse-12.c: Add -mmwaitx.
|
||||
* gcc.target/i386/sse-13.c: Ditto.
|
||||
* gcc.target/i386/sse-14.c: Ditto.
|
||||
* gcc.target/i386/sse-22.c: Ditto.
|
||||
* gcc.target/i386/sse-23.c: Ditto.
|
||||
* g++.dg/other/i386-2.C: Ditto.
|
||||
* g++.dg/other/i386-3.C: Ditto.
|
||||
|
||||
2015-06-11 Steve Ellcey <sellcey@imgtec.com>
|
||||
|
||||
* gcc.dg/tree-prof/stringop-2.c: Fix ifdef __mips.
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
|
||||
/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit" } */
|
||||
/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit -mmwaitx" } */
|
||||
|
||||
/* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
|
||||
xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
|
||||
/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit" } */
|
||||
/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit -mmwaitx" } */
|
||||
|
||||
/* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
|
||||
xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
|
||||
|
|
|
|||
|
|
@ -0,0 +1,27 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-O2 -mmwaitx" } */
|
||||
|
||||
/* Verify that they work in both 32bit and 64bit. */
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
||||
void
|
||||
foo (char *p, int x, int y, int z, int c)
|
||||
{
|
||||
_mm_monitorx (p, y, x);
|
||||
_mm_mwaitx (z, y, c);
|
||||
}
|
||||
|
||||
void
|
||||
bar (char *p, long x, long y, long z, long c)
|
||||
{
|
||||
_mm_monitorx (p, y, x);
|
||||
_mm_mwaitx (z, y, c);
|
||||
}
|
||||
|
||||
void
|
||||
foo1 (char *p)
|
||||
{
|
||||
_mm_monitorx (p, 0, 0);
|
||||
_mm_mwaitx (0, 0, 0);
|
||||
}
|
||||
|
|
@ -3,7 +3,7 @@
|
|||
popcntintrin.h and mm_malloc.h are usable
|
||||
with -O -std=c89 -pedantic-errors. */
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mclwb -mpcommit" } */
|
||||
/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mclwb -mpcommit -mmwaitx" } */
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mclwb -mpcommit" } */
|
||||
/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mclwb -mpcommit -mmwaitx" } */
|
||||
|
||||
#include <mm_malloc.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit" } */
|
||||
/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit -mmwaitx" } */
|
||||
/* { dg-add-options bind_pic_locally } */
|
||||
|
||||
#include <mm_malloc.h>
|
||||
|
|
|
|||
|
|
@ -594,6 +594,6 @@
|
|||
#define __builtin_ia32_extracti64x2_256_mask(A, E, C, D) __builtin_ia32_extracti64x2_256_mask(A, 1, C, D)
|
||||
#define __builtin_ia32_extractf64x2_256_mask(A, E, C, D) __builtin_ia32_extractf64x2_256_mask(A, 1, C, D)
|
||||
|
||||
#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,clwb,pcommit")
|
||||
#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,clwb,pcommit,mwaitx")
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
|
|
|||
Loading…
Reference in New Issue