constraints.md (Y2): Rename from Y.
* config/i386/constraints.md (Y2): Rename from Y.
(Yi): New constraint.
* config/i386/i386.md (movsi_1, movdi_2, pushdf_nointeger,
pushdf_integer, movdf_nointeger, movdf_integer, zero_extendsidi2_32,
zero_extendsidi2_rex64, truncxfdf2_mixed): Change Y constraints to Y2.
(extendsfdf2_mixed, extendsfdf2_sse, truncdfsf_fast_mixed,
truncdfsf_fast_sse, truncdfsf_mixed, fix_truncdfdi_sse,
fix_truncdfsi_sse, floatsidf2_mixed, floatsidf2_sse,
floatdidf2_mixed, floatdidf2_sse, absnegdf2_mixed,
absnegdf2_sse, sse_setccdf, fop_df_comm_mixed, fop_df_comm_sse,
fop_df_1_mixed, fop_df_1_sse): Change Y constraints to x.
* config/i386/mmx.md (mov<MMXMODEI>_internal_rex64,
mov<MMXMODEI>_internal, movv2sf_internal_rex64, movv2sf_internal,
vec_extractv2si_1): Change Y constraints to Y2.
* config/i386/sse.md (vec_setv4sf_0, vec_concatv2df, vec_dupv4si,
vec_dupv2di, sse2_concatv2si, vec_concatv4si_1, vec_concatv2di):
Change Y constraints to Y2.
(sse2_loadld): Change Y constraints to x.
From-SVN: r121660
This commit is contained in:
Richard Henderson
Richard Henderson
parent
6728236fe9
commit
5096114103
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@ -1,3 +1,24 @@
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2007-02-06 Richard Henderson <rth@redhat.com>
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* config/i386/constraints.md (Y2): Rename from Y.
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(Yi): New constraint.
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* config/i386/i386.md (movsi_1, movdi_2, pushdf_nointeger,
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pushdf_integer, movdf_nointeger, movdf_integer, zero_extendsidi2_32,
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zero_extendsidi2_rex64, truncxfdf2_mixed): Change Y constraints to Y2.
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(extendsfdf2_mixed, extendsfdf2_sse, truncdfsf_fast_mixed,
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truncdfsf_fast_sse, truncdfsf_mixed, fix_truncdfdi_sse,
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fix_truncdfsi_sse, floatsidf2_mixed, floatsidf2_sse,
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floatdidf2_mixed, floatdidf2_sse, absnegdf2_mixed,
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absnegdf2_sse, sse_setccdf, fop_df_comm_mixed, fop_df_comm_sse,
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fop_df_1_mixed, fop_df_1_sse): Change Y constraints to x.
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* config/i386/mmx.md (mov<MMXMODEI>_internal_rex64,
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mov<MMXMODEI>_internal, movv2sf_internal_rex64, movv2sf_internal,
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vec_extractv2si_1): Change Y constraints to Y2.
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* config/i386/sse.md (vec_setv4sf_0, vec_concatv2df, vec_dupv4si,
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vec_dupv2di, sse2_concatv2si, vec_concatv4si_1, vec_concatv2di):
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Change Y constraints to Y2.
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(sse2_loadld): Change Y constraints to x.
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2007-02-06 Roger Sayle <roger@eyesopen.com>
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* config/rs6000/rs6000.md (popcount<mode>2): Rewrite.
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@ -83,8 +83,16 @@
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(define_register_constraint "x" "TARGET_SSE ? SSE_REGS : NO_REGS"
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"Any SSE register.")
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(define_register_constraint "Y" "TARGET_SSE2? SSE_REGS : NO_REGS"
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"@internal Any SSE2 register.")
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;; We use the Y prefix to denote any number of conditional register sets:
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;; 2 SSE2 enabled
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;; i SSE2 inter-unit moves enabled
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(define_register_constraint "Y2" "TARGET_SSE2 ? SSE_REGS : NO_REGS"
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"@internal Any SSE register, when SSE2 is enabled.")
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(define_register_constraint "Yi"
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"TARGET_SSE2 && TARGET_INTER_UNIT_MOVES ? SSE_REGS : NO_REGS"
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"@internal Any SSE register, when SSE2 and inter-unit moves are enabled.")
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;; Integer constant constraints.
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(define_constraint "I"
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@ -1187,9 +1187,9 @@
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(define_insn "*movsi_1"
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[(set (match_operand:SI 0 "nonimmediate_operand"
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"=r ,m ,*y,*y,?rm,?*y,*x,*x,?r,m ,?*Y,*x")
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"=r ,m ,*y,*y,?rm,?*y,*x,*x,?r ,m ,?*Y2,*x")
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(match_operand:SI 1 "general_operand"
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"rinm,rin,C ,*y,*y ,rm ,C ,*x,*Y,*x,r ,m "))]
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"rinm,rin,C ,*y,*y ,rm ,C ,*x,*Y2,*x,r ,m "))]
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"!(MEM_P (operands[0]) && MEM_P (operands[1]))"
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{
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switch (get_attr_type (insn))
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@ -1981,9 +1981,9 @@
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(define_insn "*movdi_2"
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[(set (match_operand:DI 0 "nonimmediate_operand"
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"=r ,o ,*y,m*y,*y,*Y,m ,*Y,*Y,*x,m ,*x,*x")
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"=r ,o ,*y,m*y,*y,*Y2,m ,*Y2,*Y2,*x,m ,*x,*x")
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(match_operand:DI 1 "general_operand"
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"riFo,riF,C ,*y ,m ,C ,*Y,*Y,m ,C ,*x,*x,m "))]
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"riFo,riF,C ,*y ,m ,C ,*Y2,*Y2,m ,C ,*x,*x,m "))]
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"!TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
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"@
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#
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@ -2437,7 +2437,7 @@
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(define_insn "*pushdf_nointeger"
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[(set (match_operand:DF 0 "push_operand" "=<,<,<,<")
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(match_operand:DF 1 "general_no_elim_operand" "f,Fo,*r,Y"))]
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(match_operand:DF 1 "general_no_elim_operand" "f,Fo,*r,Y2"))]
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"!TARGET_64BIT && !TARGET_INTEGER_DFMODE_MOVES"
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{
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/* This insn should be already split before reg-stack. */
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@ -2449,7 +2449,7 @@
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(define_insn "*pushdf_integer"
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[(set (match_operand:DF 0 "push_operand" "=<,<,<")
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(match_operand:DF 1 "general_no_elim_operand" "f,rFo,Y"))]
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(match_operand:DF 1 "general_no_elim_operand" "f,rFo,Y2"))]
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"TARGET_64BIT || TARGET_INTEGER_DFMODE_MOVES"
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{
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/* This insn should be already split before reg-stack. */
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@ -2489,9 +2489,9 @@
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(define_insn "*movdf_nointeger"
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[(set (match_operand:DF 0 "nonimmediate_operand"
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"=f,m,f,*r ,o ,Y*x,Y*x,Y*x ,m ")
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"=f,m,f,*r ,o ,Y2*x,Y2*x,Y2*x ,m ")
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(match_operand:DF 1 "general_operand"
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"fm,f,G,*roF,F*r,C ,Y*x,mY*x,Y*x"))]
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"fm,f,G,*roF,F*r,C ,Y2*x,mY2*x,Y2*x"))]
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"!(MEM_P (operands[0]) && MEM_P (operands[1]))
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&& ((optimize_size || !TARGET_INTEGER_DFMODE_MOVES) && !TARGET_64BIT)
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&& (reload_in_progress || reload_completed
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@ -2611,9 +2611,9 @@
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(define_insn "*movdf_integer"
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[(set (match_operand:DF 0 "nonimmediate_operand"
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"=f,m,f,r ,o ,Y*x,Y*x,Y*x,m ")
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"=f,m,f,r ,o ,Y2*x,Y2*x,Y2*x,m ")
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(match_operand:DF 1 "general_operand"
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"fm,f,G,roF,Fr,C ,Y*x,m ,Y*x"))]
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"fm,f,G,roF,Fr,C ,Y2*x,m ,Y2*x"))]
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"!(MEM_P (operands[0]) && MEM_P (operands[1]))
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&& ((!optimize_size && TARGET_INTEGER_DFMODE_MOVES) || TARGET_64BIT)
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&& (reload_in_progress || reload_completed
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@ -3269,8 +3269,9 @@
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")
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(define_insn "zero_extendsidi2_32"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?*o,?*y,?*Y")
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(zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "0,rm,r,rm,rm")))
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?*o,?*y,?*Y2")
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(zero_extend:DI
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(match_operand:SI 1 "nonimmediate_operand" "0,rm,r,rm,rm")))
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(clobber (reg:CC FLAGS_REG))]
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"!TARGET_64BIT"
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"@
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@ -3283,8 +3284,9 @@
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(set_attr "type" "multi,multi,multi,mmxmov,ssemov")])
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(define_insn "zero_extendsidi2_rex64"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*y,?*Y")
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(zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "rm,0,rm,rm")))]
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*y,?*Y2")
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(zero_extend:DI
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(match_operand:SI 1 "nonimmediate_operand" "rm,0,rm,rm")))]
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"TARGET_64BIT"
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"@
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mov\t{%k1, %k0|%k0, %k1}
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@ -3644,8 +3646,9 @@
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})
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(define_insn "*extendsfdf2_mixed"
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[(set (match_operand:DF 0 "nonimmediate_operand" "=f,m,Y")
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(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm,f,mY")))]
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[(set (match_operand:DF 0 "nonimmediate_operand" "=f,m,x")
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(float_extend:DF
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(match_operand:SF 1 "nonimmediate_operand" "fm,f,xm")))]
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"TARGET_SSE2 && TARGET_MIX_SSE_I387"
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{
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switch (which_alternative)
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@ -3670,8 +3673,8 @@
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(set_attr "mode" "SF,XF,DF")])
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(define_insn "*extendsfdf2_sse"
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[(set (match_operand:DF 0 "nonimmediate_operand" "=Y")
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(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "mY")))]
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[(set (match_operand:DF 0 "nonimmediate_operand" "=x")
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(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "xm")))]
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"TARGET_SSE2 && TARGET_SSE_MATH"
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"cvtss2sd\t{%1, %0|%0, %1}"
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[(set_attr "type" "ssecvt")
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@ -3823,9 +3826,9 @@
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"")
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(define_insn "*truncdfsf_fast_mixed"
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[(set (match_operand:SF 0 "nonimmediate_operand" "=m,f,Y")
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[(set (match_operand:SF 0 "nonimmediate_operand" "=m,f,x")
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(float_truncate:SF
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(match_operand:DF 1 "nonimmediate_operand" "f ,f,Ym")))]
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(match_operand:DF 1 "nonimmediate_operand" "f ,f,xm")))]
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"TARGET_SSE2 && TARGET_MIX_SSE_I387 && flag_unsafe_math_optimizations"
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{
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switch (which_alternative)
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@ -3849,9 +3852,9 @@
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;; Yes, this one doesn't depend on flag_unsafe_math_optimizations,
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;; because nothing we do here is unsafe.
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(define_insn "*truncdfsf_fast_sse"
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[(set (match_operand:SF 0 "nonimmediate_operand" "=Y")
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[(set (match_operand:SF 0 "nonimmediate_operand" "=x")
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(float_truncate:SF
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(match_operand:DF 1 "nonimmediate_operand" "Ym")))]
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(match_operand:DF 1 "nonimmediate_operand" "xm")))]
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"TARGET_SSE2 && TARGET_SSE_MATH"
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"cvtsd2ss\t{%1, %0|%0, %1}"
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[(set_attr "type" "ssecvt")
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@ -3867,9 +3870,9 @@
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(set_attr "mode" "SF")])
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(define_insn "*truncdfsf_mixed"
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[(set (match_operand:SF 0 "nonimmediate_operand" "=m,?fx*r,Y")
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[(set (match_operand:SF 0 "nonimmediate_operand" "=m,?fx*r,Y2")
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(float_truncate:SF
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(match_operand:DF 1 "nonimmediate_operand" "f ,f ,Ym")))
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(match_operand:DF 1 "nonimmediate_operand" "f ,f ,Y2m")))
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(clobber (match_operand:SF 2 "memory_operand" "=X,m ,X"))]
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"TARGET_MIX_SSE_I387"
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{
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@ -4045,7 +4048,7 @@
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})
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(define_insn "*truncxfdf2_mixed"
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[(set (match_operand:DF 0 "nonimmediate_operand" "=m,?f,?r,?Y")
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[(set (match_operand:DF 0 "nonimmediate_operand" "=m,?f,?r,?Y2*x")
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(float_truncate:DF
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(match_operand:XF 1 "register_operand" "f,f,f,f")))
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(clobber (match_operand:DF 2 "memory_operand" "=X,m,m,m"))]
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@ -4205,7 +4208,7 @@
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(define_insn "fix_truncdfdi_sse"
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[(set (match_operand:DI 0 "register_operand" "=r,r")
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(fix:DI (match_operand:DF 1 "nonimmediate_operand" "Y,Ym")))]
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(fix:DI (match_operand:DF 1 "nonimmediate_operand" "x,xm")))]
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"TARGET_64BIT && TARGET_SSE2 && (!TARGET_FISTTP || TARGET_SSE_MATH)"
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"cvttsd2si{q}\t{%1, %0|%0, %1}"
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[(set_attr "type" "sseicvt")
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@ -4225,7 +4228,7 @@
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(define_insn "fix_truncdfsi_sse"
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[(set (match_operand:SI 0 "register_operand" "=r,r")
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(fix:SI (match_operand:DF 1 "nonimmediate_operand" "Y,Ym")))]
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(fix:SI (match_operand:DF 1 "nonimmediate_operand" "x,xm")))]
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"TARGET_SSE2 && (!TARGET_FISTTP || TARGET_SSE_MATH)"
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"cvttsd2si\t{%1, %0|%0, %1}"
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[(set_attr "type" "sseicvt")
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@ -4668,7 +4671,7 @@
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"")
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(define_insn "*floatsidf2_mixed"
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[(set (match_operand:DF 0 "register_operand" "=f,?f,Y,Y")
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[(set (match_operand:DF 0 "register_operand" "=f,?f,x,x")
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(float:DF (match_operand:SI 1 "nonimmediate_operand" "m,r,r,mr")))]
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"TARGET_SSE2 && TARGET_MIX_SSE_I387"
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"@
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@ -4684,7 +4687,7 @@
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(set_attr "fp_int_src" "true")])
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(define_insn "*floatsidf2_sse"
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[(set (match_operand:DF 0 "register_operand" "=Y,Y")
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[(set (match_operand:DF 0 "register_operand" "=x,x")
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(float:DF (match_operand:SI 1 "nonimmediate_operand" "r,mr")))]
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"TARGET_SSE2 && TARGET_SSE_MATH"
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"cvtsi2sd\t{%1, %0|%0, %1}"
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@ -4713,7 +4716,7 @@
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"")
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(define_insn "*floatdidf2_mixed"
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[(set (match_operand:DF 0 "register_operand" "=f,?f,Y,Y")
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[(set (match_operand:DF 0 "register_operand" "=f,?f,x,x")
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(float:DF (match_operand:DI 1 "nonimmediate_operand" "m,r,r,mr")))]
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"TARGET_64BIT && TARGET_SSE2 && TARGET_MIX_SSE_I387"
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"@
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@ -4729,7 +4732,7 @@
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(set_attr "fp_int_src" "true")])
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(define_insn "*floatdidf2_sse"
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[(set (match_operand:DF 0 "register_operand" "=Y,Y")
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[(set (match_operand:DF 0 "register_operand" "=x,x")
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(float:DF (match_operand:DI 1 "nonimmediate_operand" "r,mr")))]
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"TARGET_64BIT && TARGET_SSE2 && TARGET_SSE_MATH"
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"cvtsi2sd{q}\t{%1, %0|%0, %1}"
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@ -9790,20 +9793,20 @@
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"ix86_expand_fp_absneg_operator (ABS, DFmode, operands); DONE;")
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(define_insn "*absnegdf2_mixed"
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[(set (match_operand:DF 0 "nonimmediate_operand" "=Y,Y,f,rm")
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[(set (match_operand:DF 0 "nonimmediate_operand" "=x,x,f,rm")
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(match_operator:DF 3 "absneg_operator"
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[(match_operand:DF 1 "nonimmediate_operand" "0 ,Y,0,0")]))
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(use (match_operand:V2DF 2 "nonimmediate_operand" "Ym,0,X,X"))
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[(match_operand:DF 1 "nonimmediate_operand" "0 ,x,0,0")]))
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(use (match_operand:V2DF 2 "nonimmediate_operand" "xm,0,X,X"))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_SSE2 && TARGET_SSE_MATH && TARGET_MIX_SSE_I387
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&& ix86_unary_operator_ok (GET_CODE (operands[3]), DFmode, operands)"
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"#")
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(define_insn "*absnegdf2_sse"
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[(set (match_operand:DF 0 "nonimmediate_operand" "=Y,Y,rm")
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[(set (match_operand:DF 0 "nonimmediate_operand" "=x,x,rm")
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(match_operator:DF 3 "absneg_operator"
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[(match_operand:DF 1 "nonimmediate_operand" "0 ,Y,0 ")]))
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(use (match_operand:V2DF 2 "nonimmediate_operand" "Ym,0,X "))
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[(match_operand:DF 1 "nonimmediate_operand" "0 ,x,0 ")]))
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(use (match_operand:V2DF 2 "nonimmediate_operand" "xm,0,X "))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_SSE2 && TARGET_SSE_MATH
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&& ix86_unary_operator_ok (GET_CODE (operands[3]), DFmode, operands)"
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|
|
@ -13513,10 +13516,10 @@
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(set_attr "mode" "SF")])
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(define_insn "*sse_setccdf"
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[(set (match_operand:DF 0 "register_operand" "=Y")
|
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[(set (match_operand:DF 0 "register_operand" "=x")
|
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(match_operator:DF 1 "sse_comparison_operator"
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[(match_operand:DF 2 "register_operand" "0")
|
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(match_operand:DF 3 "nonimmediate_operand" "Ym")]))]
|
||||
(match_operand:DF 3 "nonimmediate_operand" "xm")]))]
|
||||
"TARGET_SSE2"
|
||||
"cmp%D1sd\t{%3, %0|%0, %3}"
|
||||
[(set_attr "type" "ssecmp")
|
||||
|
|
@ -15437,10 +15440,10 @@
|
|||
(set_attr "mode" "<MODE>")])
|
||||
|
||||
(define_insn "*fop_df_comm_mixed"
|
||||
[(set (match_operand:DF 0 "register_operand" "=f,Y")
|
||||
[(set (match_operand:DF 0 "register_operand" "=f,x")
|
||||
(match_operator:DF 3 "binary_fp_operator"
|
||||
[(match_operand:DF 1 "nonimmediate_operand" "%0,0")
|
||||
(match_operand:DF 2 "nonimmediate_operand" "fm,Ym")]))]
|
||||
[(match_operand:DF 1 "nonimmediate_operand" "%0,0")
|
||||
(match_operand:DF 2 "nonimmediate_operand" "fm,xm")]))]
|
||||
"TARGET_SSE2 && TARGET_MIX_SSE_I387
|
||||
&& COMMUTATIVE_ARITH_P (operands[3])
|
||||
&& !(MEM_P (operands[1]) && MEM_P (operands[2]))"
|
||||
|
|
@ -15456,10 +15459,10 @@
|
|||
(set_attr "mode" "DF")])
|
||||
|
||||
(define_insn "*fop_df_comm_sse"
|
||||
[(set (match_operand:DF 0 "register_operand" "=Y")
|
||||
[(set (match_operand:DF 0 "register_operand" "=x")
|
||||
(match_operator:DF 3 "binary_fp_operator"
|
||||
[(match_operand:DF 1 "nonimmediate_operand" "%0")
|
||||
(match_operand:DF 2 "nonimmediate_operand" "Ym")]))]
|
||||
[(match_operand:DF 1 "nonimmediate_operand" "%0")
|
||||
(match_operand:DF 2 "nonimmediate_operand" "xm")]))]
|
||||
"TARGET_SSE2 && TARGET_SSE_MATH
|
||||
&& COMMUTATIVE_ARITH_P (operands[3])
|
||||
&& !(MEM_P (operands[1]) && MEM_P (operands[2]))"
|
||||
|
|
@ -15486,10 +15489,10 @@
|
|||
(set_attr "mode" "DF")])
|
||||
|
||||
(define_insn "*fop_df_1_mixed"
|
||||
[(set (match_operand:DF 0 "register_operand" "=f,f,Y")
|
||||
[(set (match_operand:DF 0 "register_operand" "=f,f,x")
|
||||
(match_operator:DF 3 "binary_fp_operator"
|
||||
[(match_operand:DF 1 "nonimmediate_operand" "0,fm,0")
|
||||
(match_operand:DF 2 "nonimmediate_operand" "fm,0,Ym")]))]
|
||||
[(match_operand:DF 1 "nonimmediate_operand" "0,fm,0")
|
||||
(match_operand:DF 2 "nonimmediate_operand" "fm,0,xm")]))]
|
||||
"TARGET_SSE2 && TARGET_SSE_MATH && TARGET_MIX_SSE_I387
|
||||
&& !COMMUTATIVE_ARITH_P (operands[3])
|
||||
&& !(MEM_P (operands[1]) && MEM_P (operands[2]))"
|
||||
|
|
@ -15512,10 +15515,10 @@
|
|||
(set_attr "mode" "DF")])
|
||||
|
||||
(define_insn "*fop_df_1_sse"
|
||||
[(set (match_operand:DF 0 "register_operand" "=Y")
|
||||
[(set (match_operand:DF 0 "register_operand" "=x")
|
||||
(match_operator:DF 3 "binary_fp_operator"
|
||||
[(match_operand:DF 1 "register_operand" "0")
|
||||
(match_operand:DF 2 "nonimmediate_operand" "Ym")]))]
|
||||
[(match_operand:DF 1 "register_operand" "0")
|
||||
(match_operand:DF 2 "nonimmediate_operand" "xm")]))]
|
||||
"TARGET_SSE2 && TARGET_SSE_MATH
|
||||
&& !COMMUTATIVE_ARITH_P (operands[3])"
|
||||
"* return output_387_binary_op (insn, operands);"
|
||||
|
|
|
|||
|
|
@ -64,9 +64,9 @@
|
|||
|
||||
(define_insn "*mov<mode>_internal_rex64"
|
||||
[(set (match_operand:MMXMODEI 0 "nonimmediate_operand"
|
||||
"=rm,r,*y,*y ,m ,*y,Y ,x,x ,m,r,x")
|
||||
"=rm,r,*y,*y ,m ,*y,Y2,x,x ,m,r,x")
|
||||
(match_operand:MMXMODEI 1 "vector_move_operand"
|
||||
"Cr ,m,C ,*ym,*y,Y ,*y,C,xm,x,x,r"))]
|
||||
"Cr ,m,C ,*ym,*y,Y2,*y,C,xm,x,x,r"))]
|
||||
"TARGET_64BIT && TARGET_MMX
|
||||
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
|
||||
"@
|
||||
|
|
@ -88,9 +88,9 @@
|
|||
|
||||
(define_insn "*mov<mode>_internal"
|
||||
[(set (match_operand:MMXMODEI 0 "nonimmediate_operand"
|
||||
"=*y,*y ,m ,*y,*Y,*Y,*Y ,m ,*x,*x,*x,m ,?r ,?m")
|
||||
"=*y,*y ,m ,*y ,*Y2,*Y2,*Y2 ,m ,*x,*x,*x,m ,?r ,?m")
|
||||
(match_operand:MMXMODEI 1 "vector_move_operand"
|
||||
"C ,*ym,*y,*Y,*y,C ,*Ym,*Y,C ,*x,m ,*x,irm,r"))]
|
||||
"C ,*ym,*y,*Y2,*y ,C ,*Y2m,*Y2,C ,*x,m ,*x,irm,r"))]
|
||||
"TARGET_MMX
|
||||
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
|
||||
"@
|
||||
|
|
@ -123,9 +123,9 @@
|
|||
|
||||
(define_insn "*movv2sf_internal_rex64"
|
||||
[(set (match_operand:V2SF 0 "nonimmediate_operand"
|
||||
"=rm,r,*y ,*y ,m ,*y,Y ,x,x,x,m,r,x")
|
||||
"=rm,r,*y ,*y ,m ,*y,Y2,x,x,x,m,r,x")
|
||||
(match_operand:V2SF 1 "vector_move_operand"
|
||||
"Cr ,m ,C ,*ym,*y,Y ,*y,C,x,m,x,x,r"))]
|
||||
"Cr ,m ,C ,*ym,*y,Y2,*y,C,x,m,x,x,r"))]
|
||||
"TARGET_64BIT && TARGET_MMX
|
||||
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
|
||||
"@
|
||||
|
|
@ -148,9 +148,9 @@
|
|||
|
||||
(define_insn "*movv2sf_internal"
|
||||
[(set (match_operand:V2SF 0 "nonimmediate_operand"
|
||||
"=*y,*y ,m,*y,*Y,*x,*x,*x,m ,?r ,?m")
|
||||
"=*y,*y ,m,*y ,*Y2,*x,*x,*x,m ,?r ,?m")
|
||||
(match_operand:V2SF 1 "vector_move_operand"
|
||||
"C ,*ym,*y,*Y,*y,C ,*x,m ,*x,irm,r"))]
|
||||
"C ,*ym,*y,*Y2,*y ,C ,*x,m ,*x,irm,r"))]
|
||||
"TARGET_MMX
|
||||
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
|
||||
"@
|
||||
|
|
@ -1172,9 +1172,9 @@
|
|||
})
|
||||
|
||||
(define_insn "*vec_extractv2si_1"
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=y,Y,Y,x,frxy")
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=y,Y2,Y2,x,frxy")
|
||||
(vec_select:SI
|
||||
(match_operand:V2SI 1 "nonimmediate_operand" " 0,0,Y,0,o")
|
||||
(match_operand:V2SI 1 "nonimmediate_operand" " 0,0 ,Y2,0,o")
|
||||
(parallel [(const_int 1)])))]
|
||||
"TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
|
||||
"@
|
||||
|
|
|
|||
|
|
@ -1327,7 +1327,7 @@
|
|||
})
|
||||
|
||||
(define_insn "*vec_setv4sf_0"
|
||||
[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,Y ,m")
|
||||
[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,Y2,m")
|
||||
(vec_merge:V4SF
|
||||
(vec_duplicate:V4SF
|
||||
(match_operand:SF 2 "general_operand" " x,m,*r,x*rfF"))
|
||||
|
|
@ -2445,10 +2445,10 @@
|
|||
(set_attr "mode" "DF")])
|
||||
|
||||
(define_insn "*vec_concatv2df"
|
||||
[(set (match_operand:V2DF 0 "register_operand" "=Y,Y,Y,x,x")
|
||||
[(set (match_operand:V2DF 0 "register_operand" "=Y2,Y2,Y2,x,x")
|
||||
(vec_concat:V2DF
|
||||
(match_operand:DF 1 "nonimmediate_operand" " 0,0,m,0,0")
|
||||
(match_operand:DF 2 "vector_move_operand" " Y,m,C,x,m")))]
|
||||
(match_operand:DF 1 "nonimmediate_operand" " 0 ,0 ,m ,0,0")
|
||||
(match_operand:DF 2 "vector_move_operand" " Y2,m ,C ,x,m")))]
|
||||
"TARGET_SSE"
|
||||
"@
|
||||
unpcklpd\t{%2, %0|%0, %2}
|
||||
|
|
@ -3961,11 +3961,11 @@
|
|||
"operands[2] = CONST0_RTX (V4SImode);")
|
||||
|
||||
(define_insn "sse2_loadld"
|
||||
[(set (match_operand:V4SI 0 "register_operand" "=Y,x,x")
|
||||
[(set (match_operand:V4SI 0 "register_operand" "=Y2,x,x")
|
||||
(vec_merge:V4SI
|
||||
(vec_duplicate:V4SI
|
||||
(match_operand:SI 2 "nonimmediate_operand" "mr,m,x"))
|
||||
(match_operand:V4SI 1 "reg_or_0_operand" " C,C,0")
|
||||
(match_operand:SI 2 "nonimmediate_operand" "mr ,m,x"))
|
||||
(match_operand:V4SI 1 "reg_or_0_operand" " C ,C,0")
|
||||
(const_int 1)))]
|
||||
"TARGET_SSE"
|
||||
"@
|
||||
|
|
@ -4048,9 +4048,9 @@
|
|||
(set_attr "mode" "V2SF,V4SF,V2SF")])
|
||||
|
||||
(define_insn "*vec_dupv4si"
|
||||
[(set (match_operand:V4SI 0 "register_operand" "=Y,x")
|
||||
[(set (match_operand:V4SI 0 "register_operand" "=Y2,x")
|
||||
(vec_duplicate:V4SI
|
||||
(match_operand:SI 1 "register_operand" " Y,0")))]
|
||||
(match_operand:SI 1 "register_operand" " Y2,0")))]
|
||||
"TARGET_SSE"
|
||||
"@
|
||||
pshufd\t{$0, %1, %0|%0, %1, 0}
|
||||
|
|
@ -4059,9 +4059,9 @@
|
|||
(set_attr "mode" "TI,V4SF")])
|
||||
|
||||
(define_insn "*vec_dupv2di"
|
||||
[(set (match_operand:V2DI 0 "register_operand" "=Y,x")
|
||||
[(set (match_operand:V2DI 0 "register_operand" "=Y2,x")
|
||||
(vec_duplicate:V2DI
|
||||
(match_operand:DI 1 "register_operand" " 0,0")))]
|
||||
(match_operand:DI 1 "register_operand" " 0 ,0")))]
|
||||
"TARGET_SSE"
|
||||
"@
|
||||
punpcklqdq\t%0, %0
|
||||
|
|
@ -4073,10 +4073,10 @@
|
|||
;; nonimmediate_operand for operand 2 and *not* allowing memory for the SSE
|
||||
;; alternatives pretty much forces the MMX alternative to be chosen.
|
||||
(define_insn "*sse2_concatv2si"
|
||||
[(set (match_operand:V2SI 0 "register_operand" "=Y, Y,*y,*y")
|
||||
[(set (match_operand:V2SI 0 "register_operand" "=Y2, Y2,*y,*y")
|
||||
(vec_concat:V2SI
|
||||
(match_operand:SI 1 "nonimmediate_operand" " 0,rm, 0,rm")
|
||||
(match_operand:SI 2 "reg_or_0_operand" " Y, C,*y, C")))]
|
||||
(match_operand:SI 1 "nonimmediate_operand" " 0 ,rm , 0,rm")
|
||||
(match_operand:SI 2 "reg_or_0_operand" " Y2,C ,*y, C")))]
|
||||
"TARGET_SSE2"
|
||||
"@
|
||||
punpckldq\t{%2, %0|%0, %2}
|
||||
|
|
@ -4101,10 +4101,10 @@
|
|||
(set_attr "mode" "V4SF,V4SF,DI,DI")])
|
||||
|
||||
(define_insn "*vec_concatv4si_1"
|
||||
[(set (match_operand:V4SI 0 "register_operand" "=Y,x,x")
|
||||
[(set (match_operand:V4SI 0 "register_operand" "=Y2,x,x")
|
||||
(vec_concat:V4SI
|
||||
(match_operand:V2SI 1 "register_operand" " 0,0,0")
|
||||
(match_operand:V2SI 2 "nonimmediate_operand" " Y,x,m")))]
|
||||
(match_operand:V2SI 1 "register_operand" " 0 ,0,0")
|
||||
(match_operand:V2SI 2 "nonimmediate_operand" " Y2,x,m")))]
|
||||
"TARGET_SSE"
|
||||
"@
|
||||
punpcklqdq\t{%2, %0|%0, %2}
|
||||
|
|
@ -4114,10 +4114,10 @@
|
|||
(set_attr "mode" "TI,V4SF,V2SF")])
|
||||
|
||||
(define_insn "*vec_concatv2di"
|
||||
[(set (match_operand:V2DI 0 "register_operand" "=Y,?Y,Y,x,x,x")
|
||||
[(set (match_operand:V2DI 0 "register_operand" "=Y2,?Y2,Y2,x,x,x")
|
||||
(vec_concat:V2DI
|
||||
(match_operand:DI 1 "nonimmediate_operand" " m,*y,0,0,0,m")
|
||||
(match_operand:DI 2 "vector_move_operand" " C, C,Y,x,m,0")))]
|
||||
(match_operand:DI 1 "nonimmediate_operand" " m,*y ,0 ,0,0,m")
|
||||
(match_operand:DI 2 "vector_move_operand" " C, C,Y2,x,m,0")))]
|
||||
"TARGET_SSE"
|
||||
"@
|
||||
movq\t{%1, %0|%0, %1}
|
||||
|
|
|
|||
Loading…
Reference in New Issue