From 509a77dc9c03756c172ebc00937e984d7a2d08c4 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Sat, 21 Oct 2006 17:49:41 +0200 Subject: [PATCH] i386.md (extendsfdf2, [...]): Do not force operand1 to register if both operands are memory operands. * config/i386/i386.md (extendsfdf2, extendsfxf2, extenddfxf2): Do not force operand1 to register if both operands are memory operands. (*extendsfdf2_mixed, *extendsfdf2_sse, *extendsfdf2_i387) (*extendsfxf2_i387, *extenddfxf2_i387): Do not disable pattern if both operands are memory operands. (truncdfsf2): Do not force operand1 to register if both operands are memory operands. From-SVN: r117934 --- gcc/ChangeLog | 10 ++++++++++ gcc/config/i386/i386.md | 24 +++++------------------- 2 files changed, 15 insertions(+), 19 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 51f8f31c512..953dd25cd43 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2006-10-21 Uros Bizjak + + * config/i386/i386.md (extendsfdf2, extendsfxf2, extenddfxf2): Do not + force operand1 to register if both operands are memory operands. + (*extendsfdf2_mixed, *extendsfdf2_sse, *extendsfdf2_i387) + (*extendsfxf2_i387, *extenddfxf2_i387): Do not disable pattern + if both operands are memory operands. + (truncdfsf2): Do not force operand1 to register if both operands + are memory operands. + 2006-10-21 Kaveh R. Ghazi * Makefile.in (LIBS): Add $(GMPLIBS). diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index d24b32af42e..91596dd0c88 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -3533,15 +3533,12 @@ } operands[1] = validize_mem (force_const_mem (SFmode, operands[1])); } - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) - operands[1] = force_reg (SFmode, operands[1]); }) (define_insn "*extendsfdf2_mixed" [(set (match_operand:DF 0 "nonimmediate_operand" "=f,m,Y") (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm,f,mY")))] - "TARGET_SSE2 && TARGET_MIX_SSE_I387 - && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" + "TARGET_SSE2 && TARGET_MIX_SSE_I387" { switch (which_alternative) { @@ -3567,8 +3564,7 @@ (define_insn "*extendsfdf2_sse" [(set (match_operand:DF 0 "nonimmediate_operand" "=Y") (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "mY")))] - "TARGET_SSE2 && TARGET_SSE_MATH - && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" + "TARGET_SSE2 && TARGET_SSE_MATH" "cvtss2sd\t{%1, %0|%0, %1}" [(set_attr "type" "ssecvt") (set_attr "mode" "DF")]) @@ -3576,8 +3572,7 @@ (define_insn "*extendsfdf2_i387" [(set (match_operand:DF 0 "nonimmediate_operand" "=f,m") (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm,f")))] - "TARGET_80387 - && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" + "TARGET_80387" { switch (which_alternative) { @@ -3615,15 +3610,12 @@ } operands[1] = validize_mem (force_const_mem (SFmode, operands[1])); } - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) - operands[1] = force_reg (SFmode, operands[1]); }) (define_insn "*extendsfxf2_i387" [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m") (float_extend:XF (match_operand:SF 1 "nonimmediate_operand" "fm,f")))] - "TARGET_80387 - && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" + "TARGET_80387" { switch (which_alternative) { @@ -3663,15 +3655,12 @@ } operands[1] = validize_mem (force_const_mem (DFmode, operands[1])); } - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) - operands[1] = force_reg (DFmode, operands[1]); }) (define_insn "*extenddfxf2_i387" [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m") (float_extend:XF (match_operand:DF 1 "nonimmediate_operand" "fm,f")))] - "TARGET_80387 - && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" + "TARGET_80387" { switch (which_alternative) { @@ -3707,9 +3696,6 @@ (match_operand:DF 1 "nonimmediate_operand" "")))] "TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)" { - if (MEM_P (operands[0]) && MEM_P (operands[1])) - operands[1] = force_reg (DFmode, operands[1]); - if (TARGET_SSE2 && TARGET_SSE_MATH && !TARGET_MIX_SSE_I387) ; else if (flag_unsafe_math_optimizations)