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pa.md (mulsi3): Remove PA64 hack to work around SUBREG issues. 

* pa.md (mulsi3): Remove PA64 hack to work around SUBREG issues.
        (muldi3): Update due to SUBREG_BYTE changes.
        (casesi): Similarly.

From-SVN: r46889
This commit is contained in:
Jeffrey A Law 2001-11-09 20:00:50 +00:00 committed by Jeff Law
parent beda04276f
commit 512672fd5a
2 changed files with 11 additions and 15 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
Fri Nov 9 11:27:42 2001 Jeffrey A Law (law@cygnus.com)
* pa.md (mulsi3): Remove PA64 hack to work around SUBREG issues.
(muldi3): Update due to SUBREG_BYTE changes.
(casesi): Similarly.
2001-11-09 Zack Weinberg <zack@codesourcery.com>
* doc/invoke.texi: Remove comment referring to -xf77-version.

20
gcc/config/pa/pa.md
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@ -3881,16 +3881,6 @@
operands[1] = force_reg (SImode, operands[1]);
operands[2] = force_reg (SImode, operands[2]);
emit_insn (gen_umulsidi3 (scratch, operands[1], operands[2]));
/* We do not want (subreg:SI (XX:DI) 1)) for TARGET_64BIT since
that has no real meaning. */
if (TARGET_64BIT)
{
emit_insn (gen_rtx_SET (VOIDmode,
operands[0],
gen_rtx_SUBREG (SImode, scratch, 0)));
DONE;
}
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_SUBREG (SImode, scratch, GET_MODE_SIZE (SImode))));
DONE;
@ -3993,10 +3983,10 @@
GEN_INT (32)));
emit_move_insn (op2shifted, gen_rtx_LSHIFTRT (DImode, operands[2],
GEN_INT (32)));
op1r = gen_rtx_SUBREG (SImode, operands[1], 0);
op2r = gen_rtx_SUBREG (SImode, operands[2], 0);
op1l = gen_rtx_SUBREG (SImode, op1shifted, 0);
op2l = gen_rtx_SUBREG (SImode, op2shifted, 0);
op1r = gen_rtx_SUBREG (SImode, operands[1], 4);
op2r = gen_rtx_SUBREG (SImode, operands[2], 4);
op1l = gen_rtx_SUBREG (SImode, op1shifted, 4);
op2l = gen_rtx_SUBREG (SImode, op2shifted, 4);
/* Emit multiplies for the cross products. */
emit_insn (gen_umulsidi3 (cross_product1, op2r, op1l));
@ -5774,7 +5764,7 @@
{
rtx reg = gen_reg_rtx (DImode);
emit_insn (gen_extendsidi2 (reg, operands[0]));
operands[0] = gen_rtx_SUBREG (SImode, reg, 0);
operands[0] = gen_rtx_SUBREG (SImode, reg, 4);
}
if (!INT_5_BITS (operands[2]))