nvptx.md (nvptx_reorg_subreg): New fn, broken out of ...
* config/nvptx/nvptx.md (nvptx_reorg_subreg): New fn, broken out of ... (nvptx_reorg): Here. Keep the non-subreg pieces. From-SVN: r225154
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@ -1,3 +1,8 @@
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2015-06-29 Nathan Sidwell <nathan@codesourcery.com>
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* config/nvptx/nvptx.md (nvptx_reorg_subreg): New fn, broken out of ...
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(nvptx_reorg): Here. Keep the non-subreg pieces.
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2015-06-29 H.J. Lu <hongjiu.lu@intel.com>
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2015-06-29 H.J. Lu <hongjiu.lu@intel.com>
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* config/gnu-user.h (GNU_USER_TARGET_ENDFILE_SPEC): Use
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* config/gnu-user.h (GNU_USER_TARGET_ENDFILE_SPEC): Use
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@ -1,3 +1,4 @@
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/* Target code for NVPTX.
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/* Target code for NVPTX.
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Copyright (C) 2014-2015 Free Software Foundation, Inc.
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Copyright (C) 2014-2015 Free Software Foundation, Inc.
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Contributed by Bernd Schmidt <bernds@codesourcery.com>
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Contributed by Bernd Schmidt <bernds@codesourcery.com>
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@ -1877,20 +1878,11 @@ get_replacement (struct reg_replace *r)
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conversion copyin/copyout instructions. */
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conversion copyin/copyout instructions. */
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static void
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static void
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nvptx_reorg (void)
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nvptx_reorg_subreg (void)
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{
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{
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struct reg_replace qiregs, hiregs, siregs, diregs;
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struct reg_replace qiregs, hiregs, siregs, diregs;
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rtx_insn *insn, *next;
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rtx_insn *insn, *next;
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/* We are freeing block_for_insn in the toplev to keep compatibility
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with old MDEP_REORGS that are not CFG based. Recompute it now. */
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compute_bb_for_insn ();
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df_clear_flags (DF_LR_RUN_DCE);
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df_analyze ();
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thread_prologue_and_epilogue_insns ();
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qiregs.n_allocated = 0;
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qiregs.n_allocated = 0;
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hiregs.n_allocated = 0;
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hiregs.n_allocated = 0;
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siregs.n_allocated = 0;
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siregs.n_allocated = 0;
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@ -1966,14 +1958,44 @@ nvptx_reorg (void)
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validate_change (insn, recog_data.operand_loc[i], new_reg, false);
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validate_change (insn, recog_data.operand_loc[i], new_reg, false);
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}
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}
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}
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}
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}
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int maxregs = max_reg_num ();
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/* PTX-specific reorganization
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1) mark now-unused registers, so function begin doesn't declare
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unused registers.
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2) replace subregs with suitable sequences.
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*/
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static void
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nvptx_reorg (void)
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{
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struct reg_replace qiregs, hiregs, siregs, diregs;
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rtx_insn *insn, *next;
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/* We are freeing block_for_insn in the toplev to keep compatibility
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with old MDEP_REORGS that are not CFG based. Recompute it now. */
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compute_bb_for_insn ();
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thread_prologue_and_epilogue_insns ();
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df_clear_flags (DF_LR_RUN_DCE);
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df_set_flags (DF_NO_INSN_RESCAN | DF_NO_HARD_REGS);
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df_analyze ();
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regstat_init_n_sets_and_refs ();
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regstat_init_n_sets_and_refs ();
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for (int i = LAST_VIRTUAL_REGISTER + 1; i < maxregs; i++)
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int max_regs = max_reg_num ();
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/* Mark unused regs as unused. */
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for (int i = LAST_VIRTUAL_REGISTER + 1; i < max_regs; i++)
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if (REG_N_SETS (i) == 0 && REG_N_REFS (i) == 0)
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if (REG_N_SETS (i) == 0 && REG_N_REFS (i) == 0)
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regno_reg_rtx[i] = const0_rtx;
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regno_reg_rtx[i] = const0_rtx;
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/* Replace subregs. */
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nvptx_reorg_subreg (max_regs);
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regstat_free_n_sets_and_refs ();
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regstat_free_n_sets_and_refs ();
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df_finish_pass (true);
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}
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}
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/* Handle a "kernel" attribute; arguments as in
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/* Handle a "kernel" attribute; arguments as in
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