re PR rtl-optimization/9888 (-mcpu=k6 -Os produces out of range loop instructions)
PR optimization/9888 * config/i386/i386.md (movsi_1): Remove special alternatives for %eax register. (movhi_1): Likewise. * config/i386/i386.c (memory_address_length): Do not use short displacement when there is no base. (ix86_attr_length_address_default): Handle LEA instructions. From-SVN: r64228
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@ -1,3 +1,13 @@
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2003-03-12 Eric Botcazou <ebotcazou@libertysurf.fr>
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PR optimization/9888
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* config/i386/i386.md (movsi_1): Remove special alternatives
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for %eax register.
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(movhi_1): Likewise.
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* config/i386/i386.c (memory_address_length): Do not use
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short displacement when there is no base.
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(ix86_attr_length_address_default): Handle LEA instructions.
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2003-03-09 Eric Botcazou <ebotcazou@libertysurf.fr>
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PR optimization/9888
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@ -9939,7 +9939,8 @@ memory_address_length (addr)
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if (disp)
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{
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if (GET_CODE (disp) == CONST_INT
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&& CONST_OK_FOR_LETTER_P (INTVAL (disp), 'K'))
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&& CONST_OK_FOR_LETTER_P (INTVAL (disp), 'K')
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&& base)
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len = 1;
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else
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len = 4;
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@ -10002,6 +10003,26 @@ ix86_attr_length_address_default (insn)
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rtx insn;
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{
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int i;
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if (get_attr_type (insn) == TYPE_LEA)
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{
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rtx set = PATTERN (insn);
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if (GET_CODE (set) == SET)
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;
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else if (GET_CODE (set) == PARALLEL
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&& GET_CODE (XVECEXP (set, 0, 0)) == SET)
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set = XVECEXP (set, 0, 0);
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else
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{
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#ifdef ENABLE_CHECKING
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abort ();
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#endif
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return 0;
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}
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return memory_address_length (SET_SRC (set));
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}
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extract_insn_cached (insn);
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for (i = recog_data.n_operands - 1; i >= 0; --i)
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if (GET_CODE (recog_data.operand[i]) == MEM)
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@ -1739,14 +1739,9 @@
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(set_attr "mode" "SI")
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(set_attr "length_immediate" "1")])
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; The first alternative is used only to compute proper length of instruction.
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; Reload's algorithm does not take into account the cost of spill instructions
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; needed to free register in given class, so avoid it from choosing the first
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; alternative when eax is not available.
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(define_insn "*movsi_1"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=*?a,r,*?a,m,!*y,!rm,!*y,!*Y,!rm,!*Y")
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(match_operand:SI 1 "general_operand" "im,rinm,rinm,rin,rm,*y,*y,rm,*Y,*Y"))]
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[(set (match_operand:SI 0 "nonimmediate_operand" "=r,m,!*y,!rm,!*y,!*Y,!rm,!*Y")
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(match_operand:SI 1 "general_operand" "rinm,rin,rm,*y,*y,rm,*Y,*Y"))]
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"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
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{
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switch (get_attr_type (insn))
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@ -1771,17 +1766,16 @@
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}
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}
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[(set (attr "type")
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(cond [(eq_attr "alternative" "4,5,6")
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(cond [(eq_attr "alternative" "2,3,4")
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(const_string "mmx")
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(eq_attr "alternative" "7,8,9")
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(eq_attr "alternative" "5,6,7")
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(const_string "sse")
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(and (ne (symbol_ref "flag_pic") (const_int 0))
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(match_operand:SI 1 "symbolic_operand" ""))
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(const_string "lea")
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]
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(const_string "imov")))
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(set_attr "modrm" "0,*,0,*,*,*,*,*,*,*")
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(set_attr "mode" "SI,SI,SI,SI,SI,SI,DI,TI,SI,SI")])
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(set_attr "mode" "SI,SI,SI,SI,DI,TI,SI,SI")])
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;; Stores and loads of ax to arbitary constant address.
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;; We fake an second form of instruction to force reload to load address
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@ -1854,14 +1848,9 @@
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[(set_attr "type" "push")
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(set_attr "mode" "QI")])
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; The first alternative is used only to compute proper length of instruction.
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; Reload's algorithm does not take into account the cost of spill instructions
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; needed to free register in given class, so avoid it from choosing the first
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; alternative when eax is not available.
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(define_insn "*movhi_1"
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[(set (match_operand:HI 0 "nonimmediate_operand" "=*?a,r,r,*?a,r,m")
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(match_operand:HI 1 "general_operand" "i,r,rn,rm,rm,rn"))]
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[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,m")
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(match_operand:HI 1 "general_operand" "r,rn,rm,rn"))]
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"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
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{
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switch (get_attr_type (insn))
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@ -1878,36 +1867,35 @@
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}
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}
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[(set (attr "type")
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(cond [(and (eq_attr "alternative" "0,1")
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(cond [(and (eq_attr "alternative" "0")
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(ior (eq (symbol_ref "TARGET_PARTIAL_REG_STALL")
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(const_int 0))
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(eq (symbol_ref "TARGET_HIMODE_MATH")
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(const_int 0))))
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(const_string "imov")
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(and (eq_attr "alternative" "2,3,4")
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(and (eq_attr "alternative" "1,2")
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(match_operand:HI 1 "aligned_operand" ""))
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(const_string "imov")
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(and (ne (symbol_ref "TARGET_MOVX")
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(const_int 0))
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(eq_attr "alternative" "0,1,3,4"))
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(eq_attr "alternative" "0,2"))
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(const_string "imovx")
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]
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(const_string "imov")))
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(set (attr "mode")
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(cond [(eq_attr "type" "imovx")
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(const_string "SI")
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(and (eq_attr "alternative" "2,3,4")
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(and (eq_attr "alternative" "1,2")
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(match_operand:HI 1 "aligned_operand" ""))
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(const_string "SI")
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(and (eq_attr "alternative" "0,1")
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(and (eq_attr "alternative" "0")
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(ior (eq (symbol_ref "TARGET_PARTIAL_REG_STALL")
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(const_int 0))
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(eq (symbol_ref "TARGET_HIMODE_MATH")
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(const_int 0))))
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(const_string "SI")
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]
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(const_string "HI")))
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(set_attr "modrm" "0,*,*,0,*,*")])
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(const_string "HI")))])
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;; Stores and loads of ax to arbitary constant address.
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;; We fake an second form of instruction to force reload to load address
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