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sse.md (VI48_AVX512F): New.

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* config/i386/sse.md (VI48_AVX512F): New.
        (VI48_AVX2): Changed to ...
        (VI48_AVX2_48_AVX512F): This.
        (avx2_ashrv<mode>): Changed to ...
        (<avx2_avx512f>_ashrv<mode>): This.
        (avx2_<shift_insn>v<mode>): Changed to ...
        (<avx2_avx512f>_<shift_insn>v<mode>): This.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>

From-SVN: r203435
This commit is contained in:
Alexander Ivchenko 2013-10-11 13:50:18 +00:00 committed by Kirill Yukhin
parent f5f41d884c
commit 5348cff867
2 changed files with 38 additions and 16 deletions
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18
gcc/ChangeLog
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@ -1,3 +1,21 @@
2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com>
Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Sergey Lega <sergey.s.lega@intel.com>
Anna Tikhonova <anna.tikhonova@intel.com>
Ilya Tocar <ilya.tocar@intel.com>
Andrey Turetskiy <andrey.turetskiy@intel.com>
Ilya Verbin <ilya.verbin@intel.com>
Kirill Yukhin <kirill.yukhin@intel.com>
Michael Zolotukhin <michael.v.zolotukhin@intel.com>
* config/i386/sse.md (VI48_AVX512F): New.
(VI48_AVX2): Changed to ...
(VI48_AVX2_48_AVX512F): This.
(avx2_ashrv<mode>): Changed to ...
(<avx2_avx512f>_ashrv<mode>): This.
(avx2_<shift_insn>v<mode>): Changed to ...
(<avx2_avx512f>_<shift_insn>v<mode>): This.
2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com>
Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Sergey Lega <sergey.s.lega@intel.com>

36
gcc/config/i386/sse.md
View File

@ -210,6 +210,10 @@
(define_mode_iterator VI4_AVX512F
[(V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI])
(define_mode_iterator VI48_AVX512F
[(V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI
(V8DI "TARGET_AVX512F")])
(define_mode_iterator VI8_AVX2
[(V4DI "TARGET_AVX2") V2DI])
@ -247,9 +251,9 @@
(V8SI "TARGET_AVX2") V4SI
(V4DI "TARGET_AVX2") V2DI])
(define_mode_iterator VI48_AVX2
[(V8SI "TARGET_AVX2") V4SI
(V4DI "TARGET_AVX2") V2DI])
(define_mode_iterator VI48_AVX2_48_AVX512F
[(V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI
(V8DI "TARGET_AVX512F") (V4DI "TARGET_AVX2") V2DI])
(define_mode_iterator V48_AVX2
[V4SF V2DF
@ -11404,26 +11408,26 @@
DONE;
})
(define_insn "avx2_ashrv<mode>"
[(set (match_operand:VI4_AVX2 0 "register_operand" "=v")
(ashiftrt:VI4_AVX2
(match_operand:VI4_AVX2 1 "register_operand" "v")
(match_operand:VI4_AVX2 2 "nonimmediate_operand" "vm")))]
(define_insn "<avx2_avx512f>_ashrv<mode>"
[(set (match_operand:VI48_AVX512F 0 "register_operand" "=v")
(ashiftrt:VI48_AVX512F
(match_operand:VI48_AVX512F 1 "register_operand" "v")
(match_operand:VI48_AVX512F 2 "nonimmediate_operand" "vm")))]
"TARGET_AVX2"
"vpsravd\t{%2, %1, %0|%0, %1, %2}"
"vpsrav<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sseishft")
(set_attr "prefix" "vex")
(set_attr "prefix" "maybe_evex")
(set_attr "mode" "<sseinsnmode>")])
(define_insn "avx2_<shift_insn>v<mode>"
[(set (match_operand:VI48_AVX2 0 "register_operand" "=v")
(any_lshift:VI48_AVX2
(match_operand:VI48_AVX2 1 "register_operand" "v")
(match_operand:VI48_AVX2 2 "nonimmediate_operand" "vm")))]
(define_insn "<avx2_avx512f>_<shift_insn>v<mode>"
[(set (match_operand:VI48_AVX2_48_AVX512F 0 "register_operand" "=v")
(any_lshift:VI48_AVX2_48_AVX512F
(match_operand:VI48_AVX2_48_AVX512F 1 "register_operand" "v")
(match_operand:VI48_AVX2_48_AVX512F 2 "nonimmediate_operand" "vm")))]
"TARGET_AVX2"
"vp<vshift>v<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sseishft")
(set_attr "prefix" "vex")
(set_attr "prefix" "maybe_evex")
(set_attr "mode" "<sseinsnmode>")])
;; For avx_vec_concat<mode> insn pattern