i386: Fix up *_doubleword_mask [PR105825]

My PR105778 patch apparently broke the following testcase.
If the mask has the top relevant bit clear (i.e. we know we are shifting
by 0 to wordsize bits - 1) but doesn't have all the bits below it set,
we emit andsi3 before the shift sequence.  When the pattern had :SI
for that operand, that was just fine, but now that it can be also HImode
or for -m64 DImode, we either can use a lowpart or paradoxical subreg to
SImode as the following patch, or we use a HImode or DImode AND.
This patch does the latter.

2022-06-04  Jakub Jelinek  <jakub@redhat.com>

	PR target/105825
	* config/i386/i386.md (*ashl<dwi>3_doubleword_mask,
	*<insn><dwi>3_doubleword_mask): If top bit of mask is clear, but lower
	bits of mask aren't all set, use operands[2] mode for the AND
	operation instead of always SImode.

	* gcc.dg/pr105825.c: New test.
This commit is contained in:
Jakub Jelinek 2022-06-04 10:36:24 +02:00
parent 58b67140de
commit 53718316af
2 changed files with 25 additions and 6 deletions

View File

@ -11934,9 +11934,12 @@
if ((INTVAL (operands[3]) & ((<MODE_SIZE> * BITS_PER_UNIT) - 1))
!= ((<MODE_SIZE> * BITS_PER_UNIT) - 1))
{
rtx tem = gen_reg_rtx (SImode);
emit_insn (gen_andsi3 (tem, operands[2], operands[3]));
operands[2] = tem;
rtx xops[3];
xops[0] = gen_reg_rtx (GET_MODE (operands[2]));
xops[1] = operands[2];
xops[2] = operands[3];
ix86_expand_binary_operator (AND, GET_MODE (operands[2]), xops);
operands[2] = xops[0];
}
operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);
@ -12899,9 +12902,12 @@
if ((INTVAL (operands[3]) & ((<MODE_SIZE> * BITS_PER_UNIT) - 1))
!= ((<MODE_SIZE> * BITS_PER_UNIT) - 1))
{
rtx tem = gen_reg_rtx (SImode);
emit_insn (gen_andsi3 (tem, operands[2], operands[3]));
operands[2] = tem;
rtx xops[3];
xops[0] = gen_reg_rtx (GET_MODE (operands[2]));
xops[1] = operands[2];
xops[2] = operands[3];
ix86_expand_binary_operator (AND, GET_MODE (operands[2]), xops);
operands[2] = xops[0];
}
operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);

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@ -0,0 +1,13 @@
/* PR target/105825 */
/* { dg-do compile { target int128 } } */
/* { dg-options "-O2" } */
/* { dg-additional-options "-mavx" { target avx } } */
__int128 j;
int i;
void
foo (void)
{
j <<= __builtin_parityll (i);
}