i386.h (X87_FLOAT_MODE_P): New.
2007-04-10 Eric Christopher <echristo@apple.com> * config/i386/i386.h (X87_FLOAT_MODE_P): New. * config/i386/i386.md (*cmpfp0): Use. (*cmpfp_u, *cmpfp_<mode>, *cmpfp_i_i387): Ditto. (*cmpfp_iu_387, fix_trunc<mode>_fisttp_i386_1): Ditto. (fix_trunc<mode>_i386_fisttp): Ditto. (fix_trunc<mode>_i387_fisttp_with_temp): Ditto. (*fix_trunc<mode>_i387_1, fix_truncdi_i387): Ditto. (fix_truncdi_i387_with_temp, fix_trunc<mode>_i387): Ditto. (fix_trunc<mode>_i387_with_temp, *fp_jcc_1_387): Ditto. (*fp_jcc_2_387, *fp_jcc_5_387, *fp_jcc_6_387): Ditto. (*fp_jcc_7_387, *fp_jcc_8<mode>_387): Ditto. (unnamed_splitters): Ditto. * config/i386/i386.c (output_fix_trunc): Assert that we're not being passed a TFmode operand. From-SVN: r123700
This commit is contained in:
Eric Christopher
parent
7c57be853d
commit
54a8809004
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@ -1,3 +1,20 @@
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2007-04-10 Eric Christopher <echristo@apple.com>
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* config/i386/i386.h (X87_FLOAT_MODE_P): New.
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* config/i386/i386.md (*cmpfp0): Use.
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(*cmpfp_u, *cmpfp_<mode>, *cmpfp_i_i387): Ditto.
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(*cmpfp_iu_387, fix_trunc<mode>_fisttp_i386_1): Ditto.
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(fix_trunc<mode>_i386_fisttp): Ditto.
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(fix_trunc<mode>_i387_fisttp_with_temp): Ditto.
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(*fix_trunc<mode>_i387_1, fix_truncdi_i387): Ditto.
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(fix_truncdi_i387_with_temp, fix_trunc<mode>_i387): Ditto.
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(fix_trunc<mode>_i387_with_temp, *fp_jcc_1_387): Ditto.
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(*fp_jcc_2_387, *fp_jcc_5_387, *fp_jcc_6_387): Ditto.
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(*fp_jcc_7_387, *fp_jcc_8<mode>_387): Ditto.
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(unnamed_splitters): Ditto.
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* config/i386/i386.c (output_fix_trunc): Assert that
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we're not being passed a TFmode operand.
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2007-04-10 Zdenek Dvorak <dvorakz@suse.cz>
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PR tree-optimization/31526
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@ -121,7 +138,7 @@
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2007-04-07 Anatoly Sokolov <aesok@post.ru>
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PR target/30289
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* config/avr/avr.md (*clrmemqi, *clrmemhi): Mark operand 4 as
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* config/avr/avr.md (*clrmemqi, *clrmemhi): Mark operand 4 as
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earlyclobber.
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2007-04-07 Bruce Korb <bkorb@gnu.org>
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@ -199,7 +216,7 @@
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* langhooks.h (lang_hooks): Remove safe_from_p.
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(lhd_safe_from_p): Remove prototype.
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* langhooks.c (lhd_safe_from_p): Remove.
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2007-04-06 Jan Hubicka <jh@suse.cz>
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* cgraphunit.c (decide_is_function_needed): Do not keep always_inline
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@ -305,7 +322,7 @@
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2007-04-05 Anatoly Sokolov <aesok@post.ru>
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PR target/25448
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* config/avr/avr.c (avr_handle_fndecl_attribute): Use the
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* config/avr/avr.c (avr_handle_fndecl_attribute): Use the
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DECL_ASSEMBLER_NAME, not the DECL_NAME.
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2007-04-05 H.J. Lu <hongjiu.lu@intel.com>
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@ -1037,7 +1037,7 @@ unsigned int ix86_tune_features[X86_TUNE_LAST] = {
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/* X86_TUNE_DOUBLE_WITH_ADD */
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~m_386,
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/* X86_TUNE_USE_SAHF */
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m_PPRO | m_K6_GEODE | m_K8 | m_AMDFAM10 | m_PENT4
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| m_NOCONA | m_CORE2 | m_GENERIC,
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@ -1059,7 +1059,7 @@ unsigned int ix86_tune_features[X86_TUNE_LAST] = {
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/* X86_TUNE_PARTIAL_FLAG_REG_STALL */
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m_CORE2 | m_GENERIC,
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/* X86_TUNE_USE_HIMODE_FIOP */
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m_386 | m_486 | m_K6_GEODE,
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@ -1068,7 +1068,7 @@ unsigned int ix86_tune_features[X86_TUNE_LAST] = {
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/* X86_TUNE_USE_MOV0 */
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m_K6,
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/* X86_TUNE_USE_CLTD */
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~(m_PENT | m_K6 | m_CORE2 | m_GENERIC),
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@ -1093,10 +1093,10 @@ unsigned int ix86_tune_features[X86_TUNE_LAST] = {
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/* X86_TUNE_SINGLE_STRINGOP */
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m_386 | m_PENT4 | m_NOCONA,
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/* X86_TUNE_QIMODE_MATH */
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~0,
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/* X86_TUNE_HIMODE_MATH: On PPro this flag is meant to avoid partial
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register stalls. Just like X86_TUNE_PARTIAL_REG_STALL this option
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might be considered for Generic32 if our scheme for avoiding partial
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@ -9261,6 +9261,7 @@ output_fix_trunc (rtx insn, rtx *operands, int fisttp)
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gcc_assert (STACK_TOP_P (operands[1]));
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gcc_assert (MEM_P (operands[0]));
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gcc_assert (GET_MODE (operands[1]) != TFmode);
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if (fisttp)
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output_asm_insn ("fisttp%z0\t%0", operands);
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@ -9293,7 +9294,7 @@ output_387_ffreep (rtx *operands ATTRIBUTE_UNUSED, int opno)
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{
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static char retval[] = ".word\t0xc_df";
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int regno = REGNO (operands[opno]);
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gcc_assert (FP_REGNO_P (regno));
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retval[9] = '0' + (regno - FIRST_STACK_REG);
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@ -9683,7 +9684,7 @@ ix86_expand_vector_move (enum machine_mode mode, rtx operands[])
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movlpd mem, reg (gas syntax)
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else
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movsd mem, reg
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Code generation for unaligned packed loads of single precision data
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(x86_sse_unaligned_move_optimal overrides x86_sse_partial_reg_dependency):
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if (x86_sse_unaligned_move_optimal)
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@ -9872,7 +9873,7 @@ ix86_expand_push (enum machine_mode mode, rtx x)
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/* Helper function of ix86_fixup_binary_operands to canonicalize
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operand order. Returns true if the operands should be swapped. */
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static bool
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ix86_swap_binary_operands_p (enum rtx_code code, enum machine_mode mode,
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rtx operands[])
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@ -10267,7 +10268,7 @@ ix86_expand_convert_sign_didf_sse (rtx target, rtx input)
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{
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REAL_VALUE_TYPE TWO32r;
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rtx fp_lo, fp_hi, x;
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fp_lo = gen_reg_rtx (DFmode);
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fp_hi = gen_reg_rtx (DFmode);
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@ -12686,11 +12687,11 @@ ix86_expand_sse_unpack (rtx operands[2], bool unsigned_p, bool high_p)
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case V4SImode:
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if (high_p)
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unpack = gen_vec_interleave_highv4si;
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else
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else
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unpack = gen_vec_interleave_lowv4si;
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break;
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default:
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gcc_unreachable ();
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gcc_unreachable ();
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}
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dest = gen_lowpart (imode, operands[0]);
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@ -13566,7 +13567,7 @@ counter_mode (rtx count_exp)
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The size is rounded down to whole number of chunk size moved at once.
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SRCMEM and DESTMEM provide MEMrtx to feed proper aliasing info. */
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static void
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expand_set_or_movmem_via_loop (rtx destmem, rtx srcmem,
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@ -13610,7 +13611,7 @@ expand_set_or_movmem_via_loop (rtx destmem, rtx srcmem,
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srcmem = change_address (srcmem, mode, y_addr);
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/* When unrolling for chips that reorder memory reads and writes,
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we can save registers by using single temporary.
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we can save registers by using single temporary.
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Also using 4 temporaries is overkill in 32bit mode. */
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if (!TARGET_64BIT && 0)
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{
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@ -13694,7 +13695,7 @@ expand_set_or_movmem_via_loop (rtx destmem, rtx srcmem,
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emit_label (out_label);
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}
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/* Output "rep; mov" instruction.
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/* Output "rep; mov" instruction.
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Arguments have same meaning as for previous function */
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static void
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expand_movmem_via_rep_mov (rtx destmem, rtx srcmem,
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@ -13734,7 +13735,7 @@ expand_movmem_via_rep_mov (rtx destmem, rtx srcmem,
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destexp, srcexp));
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}
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/* Output "rep; stos" instruction.
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/* Output "rep; stos" instruction.
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Arguments have same meaning as for previous function */
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static void
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expand_setmem_via_rep_stos (rtx destmem, rtx destptr, rtx value,
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@ -14182,7 +14183,7 @@ decide_alg (HOST_WIDE_INT count, HOST_WIDE_INT expected_size, bool memset,
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/* When asked to inline the call anyway, try to pick meaningful choice.
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We look for maximal size of block that is faster to copy by hand and
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take blocks of at most of that size guessing that average size will
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be roughly half of the block.
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be roughly half of the block.
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If this turns out to be bad, we might simply specify the preferred
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choice in ix86_costs. */
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@ -14292,7 +14293,7 @@ smallest_pow2_greater_than (int val)
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4) Epilogue: code copying tail of the block that is too small to be
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handled by main body (or up to size guarded by prologue guard). */
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int
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ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp,
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rtx expected_align_exp, rtx expected_size_exp)
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@ -14484,7 +14485,7 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp,
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while we want to copy only COUNT_EXP & SIZE_NEEDED bytes.
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Epilogue code will actually copy COUNT_EXP & EPILOGUE_SIZE_NEEDED
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bytes. Compensate if needed. */
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if (size_needed < epilogue_size_needed)
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{
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tmp =
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@ -14680,7 +14681,7 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp,
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mode = DImode;
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count_exp = force_reg (mode, count_exp);
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}
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/* Do the cheap promotion to allow better CSE across the
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/* Do the cheap promotion to allow better CSE across the
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main loop and epilogue (ie one load of the big constant in the
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front of all code. */
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if (CONST_INT_P (val_exp))
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@ -17414,11 +17415,11 @@ ix86_init_mmx_sse_builtins (void)
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IX86_BUILTIN_PALIGNR);
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/* AMDFAM10 SSE4A New built-ins */
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def_builtin (MASK_SSE4A, "__builtin_ia32_movntsd",
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def_builtin (MASK_SSE4A, "__builtin_ia32_movntsd",
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void_ftype_pdouble_v2df, IX86_BUILTIN_MOVNTSD);
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def_builtin (MASK_SSE4A, "__builtin_ia32_movntss",
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def_builtin (MASK_SSE4A, "__builtin_ia32_movntss",
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void_ftype_pfloat_v4sf, IX86_BUILTIN_MOVNTSS);
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def_builtin (MASK_SSE4A, "__builtin_ia32_extrqi",
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def_builtin (MASK_SSE4A, "__builtin_ia32_extrqi",
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v2di_ftype_v2di_unsigned_unsigned, IX86_BUILTIN_EXTRQI);
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def_builtin (MASK_SSE4A, "__builtin_ia32_extrq",
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v2di_ftype_v2di_v16qi, IX86_BUILTIN_EXTRQ);
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@ -18647,7 +18648,7 @@ ix86_builtin_conversion (enum tree_code code, tree type)
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{
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if (TREE_CODE (type) != VECTOR_TYPE)
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return NULL_TREE;
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switch (code)
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{
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case FLOAT_EXPR:
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@ -1362,6 +1362,11 @@ enum reg_class
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#define ANY_FP_REG_P(X) (REG_P (X) && ANY_FP_REGNO_P (REGNO (X)))
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#define ANY_FP_REGNO_P(N) (FP_REGNO_P (N) || SSE_REGNO_P (N))
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#define X87_FLOAT_MODE_P(MODE) \
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((MODE) == SFmode \
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|| (MODE) == DFmode \
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|| (MODE) == XFmode)
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#define SSE_REG_P(N) (REG_P (N) && SSE_REGNO_P (REGNO (N)))
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#define SSE_REGNO_P(N) \
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(IN_RANGE ((N), FIRST_SSE_REG, LAST_SSE_REG) \
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