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s390.md ("muldf3", [...]): Do not clobber CC.

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* config/s390/s390.md ("muldf3", "*muldf3", "*muldf3_ibm",
	"mulsf3", "*mulsf3", "*mulsf3_ibm"): Do not clobber CC.
	("divdf3", "*divdf3", "*divdf3_ibm", "divsf3", "*divsf3",
	"*divsf3_ibm"): Likewise.

From-SVN: r72488
This commit is contained in:
Ulrich Weigand 2003-10-14 19:21:45 +00:00 committed by Ulrich Weigand
parent 43aba51835
commit 553e5ce9e1
2 changed files with 27 additions and 36 deletions
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7
gcc/ChangeLog
View File

@ -1,3 +1,10 @@
2003-10-14 Ulrich Weigand <uweigand@de.ibm.com>
* config/s390/s390.md ("muldf3", "*muldf3", "*muldf3_ibm",
"mulsf3", "*mulsf3", "*mulsf3_ibm"): Do not clobber CC.
("divdf3", "*divdf3", "*divdf3_ibm", "divsf3", "*divsf3",
"*divsf3_ibm"): Likewise.
2003-10-14 Nathanael Nerode <neroden@gcc.gnu.org>
* config.gcc, config/m68hc11/t-m68hc11-gas: Replace uses of

56
gcc/config/s390/s390.md
View File

@ -4153,19 +4153,16 @@
;
(define_expand "muldf3"
[(parallel
[(set (match_operand:DF 0 "register_operand" "=f,f")
(mult:DF (match_operand:DF 1 "nonimmediate_operand" "%0,0")
(match_operand:DF 2 "general_operand" "f,R")))
(clobber (reg:CC 33))])]
[(set (match_operand:DF 0 "register_operand" "=f,f")
(mult:DF (match_operand:DF 1 "nonimmediate_operand" "%0,0")
(match_operand:DF 2 "general_operand" "f,R")))]
"TARGET_HARD_FLOAT"
"")
(define_insn "*muldf3"
[(set (match_operand:DF 0 "register_operand" "=f,f")
(mult:DF (match_operand:DF 1 "nonimmediate_operand" "%0,0")
(match_operand:DF 2 "general_operand" "f,R")))
(clobber (reg:CC 33))]
(match_operand:DF 2 "general_operand" "f,R")))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"@
mdbr\t%0,%2
@ -4176,8 +4173,7 @@
(define_insn "*muldf3_ibm"
[(set (match_operand:DF 0 "register_operand" "=f,f")
(mult:DF (match_operand:DF 1 "nonimmediate_operand" "%0,0")
(match_operand:DF 2 "general_operand" "f,R")))
(clobber (reg:CC 33))]
(match_operand:DF 2 "general_operand" "f,R")))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
"@
mdr\t%0,%2
@ -4214,19 +4210,16 @@
;
(define_expand "mulsf3"
[(parallel
[(set (match_operand:SF 0 "register_operand" "=f,f")
(mult:SF (match_operand:SF 1 "nonimmediate_operand" "%0,0")
(match_operand:SF 2 "general_operand" "f,R")))
(clobber (reg:CC 33))])]
[(set (match_operand:SF 0 "register_operand" "=f,f")
(mult:SF (match_operand:SF 1 "nonimmediate_operand" "%0,0")
(match_operand:SF 2 "general_operand" "f,R")))]
"TARGET_HARD_FLOAT"
"")
(define_insn "*mulsf3"
[(set (match_operand:SF 0 "register_operand" "=f,f")
(mult:SF (match_operand:SF 1 "nonimmediate_operand" "%0,0")
(match_operand:SF 2 "general_operand" "f,R")))
(clobber (reg:CC 33))]
(match_operand:SF 2 "general_operand" "f,R")))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"@
meebr\t%0,%2
@ -4237,8 +4230,7 @@
(define_insn "*mulsf3_ibm"
[(set (match_operand:SF 0 "register_operand" "=f,f")
(mult:SF (match_operand:SF 1 "nonimmediate_operand" "%0,0")
(match_operand:SF 2 "general_operand" "f,R")))
(clobber (reg:CC 33))]
(match_operand:SF 2 "general_operand" "f,R")))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
"@
mer\t%0,%2
@ -4710,19 +4702,16 @@
;
(define_expand "divdf3"
[(parallel
[(set (match_operand:DF 0 "register_operand" "=f,f")
(div:DF (match_operand:DF 1 "register_operand" "0,0")
(match_operand:DF 2 "general_operand" "f,R")))
(clobber (reg:CC 33))])]
[(set (match_operand:DF 0 "register_operand" "=f,f")
(div:DF (match_operand:DF 1 "register_operand" "0,0")
(match_operand:DF 2 "general_operand" "f,R")))]
"TARGET_HARD_FLOAT"
"")
(define_insn "*divdf3"
[(set (match_operand:DF 0 "register_operand" "=f,f")
(div:DF (match_operand:DF 1 "register_operand" "0,0")
(match_operand:DF 2 "general_operand" "f,R")))
(clobber (reg:CC 33))]
(match_operand:DF 2 "general_operand" "f,R")))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"@
ddbr\t%0,%2
@ -4733,8 +4722,7 @@
(define_insn "*divdf3_ibm"
[(set (match_operand:DF 0 "register_operand" "=f,f")
(div:DF (match_operand:DF 1 "register_operand" "0,0")
(match_operand:DF 2 "general_operand" "f,R")))
(clobber (reg:CC 33))]
(match_operand:DF 2 "general_operand" "f,R")))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
"@
ddr\t%0,%2
@ -4747,19 +4735,16 @@
;
(define_expand "divsf3"
[(parallel
[(set (match_operand:SF 0 "register_operand" "=f,f")
(div:SF (match_operand:SF 1 "register_operand" "0,0")
(match_operand:SF 2 "general_operand" "f,R")))
(clobber (reg:CC 33))])]
[(set (match_operand:SF 0 "register_operand" "=f,f")
(div:SF (match_operand:SF 1 "register_operand" "0,0")
(match_operand:SF 2 "general_operand" "f,R")))]
"TARGET_HARD_FLOAT"
"")
(define_insn "*divsf3"
[(set (match_operand:SF 0 "register_operand" "=f,f")
(div:SF (match_operand:SF 1 "register_operand" "0,0")
(match_operand:SF 2 "general_operand" "f,R")))
(clobber (reg:CC 33))]
(match_operand:SF 2 "general_operand" "f,R")))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"@
debr\t%0,%2
@ -4770,8 +4755,7 @@
(define_insn "*divsf3"
[(set (match_operand:SF 0 "register_operand" "=f,f")
(div:SF (match_operand:SF 1 "register_operand" "0,0")
(match_operand:SF 2 "general_operand" "f,R")))
(clobber (reg:CC 33))]
(match_operand:SF 2 "general_operand" "f,R")))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
"@
der\t%0,%2