rs6000: Fix constraint v with rs6000_constraints[RS6000_CONSTRAINT_v]
Currently we hardcode ALTIVEC_REGS for register constraint v and RS6000_CONSTRAINT_v looks confusing, this is to fix it with rs6000_constraints[RS6000_CONSTRAINT_v] to align with some other existing register constraints with RS6000_CONSTRAINT_*. gcc/ChangeLog: * config/rs6000/constraints.md (register constraint v): Use rs6000_constraints[RS6000_CONSTRAINT_v] instead of ALTIVEC_REGS.
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@ -37,7 +37,7 @@
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historically @code{f} was for single-precision and @code{d} was for
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historically @code{f} was for single-precision and @code{d} was for
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double-precision floating point.")
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double-precision floating point.")
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(define_register_constraint "v" "ALTIVEC_REGS"
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(define_register_constraint "v" "rs6000_constraints[RS6000_CONSTRAINT_v]"
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"An Altivec vector register (VR), @code{v0}@dots{}@code{v31}.")
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"An Altivec vector register (VR), @code{v0}@dots{}@code{v31}.")
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(define_register_constraint "wa" "rs6000_constraints[RS6000_CONSTRAINT_wa]"
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(define_register_constraint "wa" "rs6000_constraints[RS6000_CONSTRAINT_wa]"
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