h8300-protos.h (general_operand_dst_push): Remove.
* h8300-protos.h (general_operand_dst_push): Remove. * h8300.c (general_operand_dst_push): Likewise. * h8300.h (OK_FOR_T): Likewise. (EXTRA_CONSTRAINTS): Do not use OK_FOR_T. * h8300.md (pushqi_h8300): New. (pushqi_h8300hs): Likewise. (pushqi): Likewise. (pushhi_h8300): Likewise. (pushhi_h8300hs): Likewise. (pushhi): Likewise. From-SVN: r45470
This commit is contained in:
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7b9e1fcf2d
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5660465a0b
@ -1,3 +1,16 @@
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Fri Sep 7 11:52:30 2001 Kazu Hirata <kazu@hxi.com>
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* h8300-protos.h (general_operand_dst_push): Remove.
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* h8300.c (general_operand_dst_push): Likewise.
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* h8300.h (OK_FOR_T): Likewise.
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(EXTRA_CONSTRAINTS): Do not use OK_FOR_T.
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* h8300.md (pushqi_h8300): New.
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(pushqi_h8300hs): Likewise.
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(pushqi): Likewise.
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(pushhi_h8300): Likewise.
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(pushhi_h8300hs): Likewise.
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(pushhi): Likewise.
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Fri Sep 7 12:56:26 2001 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
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* genattrtab.c (attr_printf): First arg is unsigned.
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@ -46,7 +46,6 @@ extern void split_adds_subs PARAMS ((enum machine_mode, rtx[]));
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extern int general_operand_src PARAMS ((rtx, enum machine_mode));
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extern int general_operand_dst PARAMS ((rtx, enum machine_mode));
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extern int general_operand_dst_push PARAMS ((rtx, enum machine_mode mode));
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extern int o_operand PARAMS ((rtx, enum machine_mode));
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extern int p_operand PARAMS ((rtx, enum machine_mode));
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extern int call_insn_operand PARAMS ((rtx, enum machine_mode));
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@ -538,7 +538,7 @@ general_operand_src (op, mode)
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}
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/* Return true if OP is a valid destination operand for an integer move
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instruction, excluding those involving pre_modify. */
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instruction. */
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int
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general_operand_dst (op, mode)
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@ -550,20 +550,6 @@ general_operand_dst (op, mode)
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return general_operand (op, mode);
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}
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/* Return true if OP is a valid destination operand for an integer move
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instruction, including those involving pre_modify. */
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int
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general_operand_dst_push (op, mode)
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rtx op;
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enum machine_mode mode;
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{
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if (push_operand (op, mode))
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return 1;
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return general_operand_dst (op, mode);
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}
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/* Return true if OP is a const valid for a bit clear instruction. */
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int
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@ -871,16 +871,6 @@ struct cum_arg
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(GET_CODE (X) == CONST_INT && TARGET_H8300H \
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&& 0xffff00 <= INTVAL (X) && INTVAL (X) <= 0xffffff)
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/* 'T' if valid for a push destination using pre_modify. */
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#define OK_FOR_T(OP) \
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(GET_CODE (OP) == MEM \
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&& GET_CODE (XEXP (OP, 0)) == PRE_MODIFY \
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&& GET_CODE (XEXP (XEXP (OP, 0), 1)) == PLUS \
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&& XEXP (XEXP (XEXP (OP, 0), 1), 0) == XEXP (XEXP (OP, 0), 0) \
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&& GET_CODE (XEXP (XEXP (XEXP (OP, 0), 1), 1)) == CONST_INT \
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&& INTVAL (XEXP (XEXP (XEXP (OP, 0), 1), 1)) == - (int) STACK_BOUNDARY / 8 \
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&& XEXP (XEXP (OP, 0), 0) == stack_pointer_rtx)
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/* 'U' if valid for a bset destination;
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i.e. a register, register indirect, or the eightbit memory region
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(a SYMBOL_REF with an SYMBOL_REF_FLAG set).
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@ -903,8 +893,7 @@ struct cum_arg
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&& GET_CODE (XEXP (OP, 0)) == CONST_INT))
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#define EXTRA_CONSTRAINT(OP, C) \
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((C) == 'T' ? OK_FOR_T (OP) : \
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(C) == 'U' ? OK_FOR_U (OP) : \
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((C) == 'U' ? OK_FOR_U (OP) : \
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0)
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/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
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@ -106,9 +106,41 @@
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;; movqi
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(define_insn "pushqi1_h8300"
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[(parallel [(set (reg:HI 7)
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(plus:HI (reg:HI 7) (const_int -2)))
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(set (mem:QI (plus:HI (reg:HI 7) (const_int -1)))
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(match_operand:QI 0 "register_operand" "r"))])]
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"TARGET_H8300"
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"mov.w %T0,@-r7"
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[(set_attr "length" "2")
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(set_attr "cc" "clobber")])
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(define_insn "pushqi1_h8300hs"
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[(parallel [(set (reg:SI 7)
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(plus:SI (reg:SI 7) (const_int -4)))
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(set (mem:QI (plus:SI (reg:SI 7) (const_int -3)))
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(match_operand:QI 0 "register_operand" "r"))])]
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"TARGET_H8300H || TARGET_H8300S"
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"mov.l %S0,@-er7"
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[(set_attr "length" "4")
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(set_attr "cc" "clobber")])
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(define_expand "pushqi1"
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[(use (match_operand:QI 0 "register_operand" "r"))]
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""
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"
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{
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if (TARGET_H8300)
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emit_insn (gen_pushqi1_h8300 (operands[0]));
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else
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emit_insn (gen_pushqi1_h8300hs (operands[0]));
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DONE;
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}")
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand_dst_push" "=r,r ,<,T,r,r,m")
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(match_operand:QI 1 "general_operand_src" " I,r>,r,r,n,m,r"))]
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[(set (match_operand:QI 0 "general_operand_dst" "=r,r ,<,r,r,m")
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(match_operand:QI 1 "general_operand_src" " I,r>,r,n,m,r"))]
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"TARGET_H8300
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&& (register_operand (operands[0],QImode)
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|| register_operand (operands[1], QImode))"
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@ -116,16 +148,15 @@
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sub.b %X0,%X0
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mov.b %R1,%X0
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mov.b %X1,%R0
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mov.w %T1,@-r7
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mov.b %R1,%X0
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mov.b %R1,%X0
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mov.b %X1,%R0"
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[(set_attr "length" "2,2,2,2,2,4,4")
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(set_attr "cc" "set_zn,set_znv,set_znv,clobber,set_znv,set_znv,set_znv")])
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[(set_attr "length" "2,2,2,2,4,4")
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(set_attr "cc" "set_zn,set_znv,set_znv,set_znv,set_znv,set_znv")])
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand_dst_push" "=r,r ,<,r,T,r,m")
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(match_operand:QI 1 "general_operand_src" " I,r>,r,n,r,m,r"))]
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[(set (match_operand:QI 0 "general_operand_dst" "=r,r ,<,r,r,m")
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(match_operand:QI 1 "general_operand_src" " I,r>,r,n,m,r"))]
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"(TARGET_H8300H || TARGET_H8300S)
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&& (register_operand (operands[0],QImode)
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|| register_operand (operands[1], QImode))"
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@ -134,14 +165,13 @@
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mov.b %R1,%X0
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mov.b %X1,%R0
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mov.b %R1,%X0
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mov.l %S1,@-er7
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mov.b %R1,%X0
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mov.b %X1,%R0"
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[(set_attr "length" "2,2,2,2,4,8,8")
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(set_attr "cc" "set_zn,set_znv,set_znv,clobber,set_znv,set_znv,set_znv")])
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[(set_attr "length" "2,2,2,2,8,8")
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(set_attr "cc" "set_zn,set_znv,set_znv,clobber,set_znv,set_znv")])
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(define_expand "movqi"
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[(set (match_operand:QI 0 "general_operand_dst_push" "")
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[(set (match_operand:QI 0 "general_operand_dst" "")
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(match_operand:QI 1 "general_operand_src" ""))]
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""
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"
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@ -170,6 +200,34 @@
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;; movhi
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(define_expand "pushhi1_h8300"
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[(set (mem:QI (pre_dec:HI (reg:HI 7)))
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(match_operand:QI 0 "register_operand" "r"))]
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"TARGET_H8300"
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"")
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(define_insn "pushhi1_h8300hs"
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[(parallel [(set (reg:SI 7)
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(plus:SI (reg:SI 7) (const_int -4)))
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(set (mem:HI (plus:SI (reg:SI 7) (const_int -2)))
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(match_operand:HI 0 "register_operand" "r"))])]
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"TARGET_H8300H || TARGET_H8300S"
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"mov.l %S0,@-er7"
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[(set_attr "length" "4")
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(set_attr "cc" "clobber")])
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(define_expand "pushhi1"
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[(use (match_operand:QI 0 "register_operand" "r"))]
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""
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"
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{
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if (TARGET_H8300)
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emit_insn (gen_pushhi1_h8300 (operands[0]));
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else
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emit_insn (gen_pushhi1_h8300hs (operands[0]));
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DONE;
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}")
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(define_insn ""
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[(set (match_operand:HI 0 "general_operand_dst" "=r,r,<,r,r,m")
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(match_operand:HI 1 "general_operand_src" "I,r>,r,i,m,r"))]
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@ -192,8 +250,8 @@
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(set_attr "cc" "set_zn,set_znv,set_znv,set_znv,set_znv,set_znv")])
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(define_insn ""
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[(set (match_operand:HI 0 "general_operand_dst_push" "=r,r,<,T,r,r,m")
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(match_operand:HI 1 "general_operand_src" "I,r>,r,r,i,m,r"))]
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[(set (match_operand:HI 0 "general_operand_dst" "=r,r,<,r,r,m")
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(match_operand:HI 1 "general_operand_src" "I,r>,r,i,m,r"))]
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"(TARGET_H8300H || TARGET_H8300S)
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&& (register_operand (operands[0],HImode)
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|| register_operand (operands[1], HImode))"
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@ -201,15 +259,14 @@
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sub.w %T0,%T0
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mov.w %T1,%T0
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mov.w %T1,%T0
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mov.l %S1,@-er7
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mov.w %T1,%T0
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mov.w %T1,%T0
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mov.w %T1,%T0"
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[(set_attr "length" "2,2,2,4,4,8,8")
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(set_attr "cc" "set_zn,set_znv,set_znv,clobber,set_znv,set_znv,set_znv")])
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[(set_attr "length" "2,2,2,4,8,8")
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(set_attr "cc" "set_zn,set_znv,set_znv,set_znv,set_znv,set_znv")])
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(define_expand "movhi"
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[(set (match_operand:HI 0 "general_operand_dst_push" "")
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[(set (match_operand:HI 0 "general_operand_dst" "")
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(match_operand:HI 1 "general_operand_src" ""))]
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""
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"
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