arm.c (all_fpus): Fix comment typo.
* config/arm/arm.c (all_fpus): Fix comment typo. * config/darwin.c: Likewise. * config/frv/frv.h (FRV_STRUCT_VALUE_REGNUM): Likewise. * config/h8300/h8300.md (extendqisi2_h8300hs): Likewise. * config/m68hc11/m68hc11.c (m68hc11_reload_operands): Likewise. From-SVN: r109238
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@ -1,3 +1,11 @@
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2006-01-02 Volker Reichelt <reichelt@igpm.rwth-aachen.de>
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* config/arm/arm.c (all_fpus): Fix comment typo.
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* config/darwin.c: Likewise.
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* config/frv/frv.h (FRV_STRUCT_VALUE_REGNUM): Likewise.
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* config/h8300/h8300.md (extendqisi2_h8300hs): Likewise.
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* config/m68hc11/m68hc11.c (m68hc11_reload_operands): Likewise.
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2006-01-01 David Edelsohn <edelsohn@gnu.org>
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* config/rs6000/rs6000.c (rs6000_expand_compare_and_swapqhi): New.
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@ -638,7 +638,7 @@ struct fpu_desc
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};
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/* Available values for for -mfpu=. */
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/* Available values for -mfpu=. */
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static const struct fpu_desc all_fpus[] =
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{
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@ -53,7 +53,7 @@ Boston, MA 02110-1301, USA. */
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able to do easily. These changes allow gdb to load in
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recompilation of a translation unit that has been changed into a
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running program and replace existing functions and methods of that
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translation unit with with versions of those functions and methods
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translation unit with versions of those functions and methods
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from the newly compiled translation unit. The new functions access
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the existing static symbols from the old translation unit, if the
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symbol existed in the unit to be replaced, and from the new
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@ -1808,7 +1808,7 @@ typedef struct frv_stack {
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/* How Large Values are Returned. */
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/* The number of the register that is used to to pass the structure
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/* The number of the register that is used to pass the structure
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value address. */
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#define FRV_STRUCT_VALUE_REGNUM (GPR_FIRST + 3)
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@ -2775,7 +2775,7 @@
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[(set_attr "length" "8,12")])
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;; The following pattern is needed because without the pattern, the
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;; combiner would split (sign_extend:SI (reg:QI)) into into two 24-bit
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;; combiner would split (sign_extend:SI (reg:QI)) into two 24-bit
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;; shifts, one ashift and one ashiftrt.
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(define_insn_and_split "*extendqisi2_h8300hs"
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@ -822,7 +822,7 @@ m68hc11_reload_operands (rtx operands[])
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}
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/* If the offset is out of range, we have to compute the address
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with a separate add instruction. We try to do with with an 8-bit
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with a separate add instruction. We try to do this with an 8-bit
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add on the A register. This is possible only if the lowest part
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of the offset (i.e., big_offset % 256) is a valid constant offset
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with respect to the mode. If it's not, we have to generate a
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