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[PATCH AArch64 2/2] Remove vector compare/tst __builtins

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* config/aarch64/aarch64-builtins.c (aarch64_fold_builtin): Remove code
	handling cmge, cmgt, cmeq, cmtst.

	* config/aarch64/aarch64-simd-builtins.def (cmeq, cmge, cmgt, cmle,
	cmlt, cmgeu, cmgtu, cmtst): Remove.

	* config/aarch64/arm_neon.h (vceq_*, vceqq_*, vceqz_*, vceqzq_*,
	vcge_*, vcgeq_*, vcgez_*, vcgezq_*, vcgt_*, vcgtq_*, vcgtz_*,
	vcgtzq_*, vcle_*, vcleq_*, vclez_*, vclezq_*, vclt_*, vcltq_*,
	vcltz_*, vcltzq_*, vtst_*, vtstq_*): Use gcc vector extensions.

From-SVN: r214949
This commit is contained in:
Alan Lawrence 2014-09-05 11:09:28 +00:00 committed by Alan Lawrence
parent ddeabd3e66
commit 5726d3760b
4 changed files with 173 additions and 306 deletions
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13
gcc/ChangeLog
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@ -1,3 +1,16 @@
2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
* config/aarch64/aarch64-builtins.c (aarch64_fold_builtin): Remove code
handling cmge, cmgt, cmeq, cmtst.
* config/aarch64/aarch64-simd-builtins.def (cmeq, cmge, cmgt, cmle,
cmlt, cmgeu, cmgtu, cmtst): Remove.
* config/aarch64/arm_neon.h (vceq_*, vceqq_*, vceqz_*, vceqzq_*,
vcge_*, vcgeq_*, vcgez_*, vcgezq_*, vcgt_*, vcgtq_*, vcgtz_*,
vcgtzq_*, vcle_*, vcleq_*, vclez_*, vclezq_*, vclt_*, vcltq_*,
vcltz_*, vcltzq_*, vtst_*, vtstq_*): Use gcc vector extensions.
2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
* config/aarch64/aarch64-builtins.c (aarch64_types_cmtst_qualifiers,

16
gcc/config/aarch64/aarch64-builtins.c
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@ -1281,22 +1281,6 @@ aarch64_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *args,
BUILTIN_VALLDI (UNOP, abs, 2)
return fold_build1 (ABS_EXPR, type, args[0]);
break;
BUILTIN_VALLDI (BINOP, cmge, 0)
return fold_build2 (GE_EXPR, type, args[0], args[1]);
break;
BUILTIN_VALLDI (BINOP, cmgt, 0)
return fold_build2 (GT_EXPR, type, args[0], args[1]);
break;
BUILTIN_VALLDI (BINOP, cmeq, 0)
return fold_build2 (EQ_EXPR, type, args[0], args[1]);
break;
BUILTIN_VSDQ_I_DI (TST, cmtst, 0)
{
tree and_node = fold_build2 (BIT_AND_EXPR, type, args[0], args[1]);
tree vec_zero_node = build_zero_cst (type);
return fold_build2 (NE_EXPR, type, and_node, vec_zero_node);
break;
}
VAR1 (REINTERP_SS, reinterpretdi, 0, v1df)
VAR1 (REINTERP_SS, reinterpretv8qi, 0, v1df)
VAR1 (REINTERP_SS, reinterpretv4hi, 0, v1df)

11
gcc/config/aarch64/aarch64-simd-builtins.def
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@ -237,17 +237,6 @@
BUILTIN_VSDQ_I (SHIFTIMM, sqshl_n, 0)
BUILTIN_VSDQ_I (USHIFTIMM, uqshl_n, 0)
/* Implemented by aarch64_cm<cmp><mode>. */
BUILTIN_VALLDI (BINOP, cmeq, 0)
BUILTIN_VALLDI (BINOP, cmge, 0)
BUILTIN_VALLDI (BINOP, cmgt, 0)
BUILTIN_VALLDI (BINOP, cmle, 0)
BUILTIN_VALLDI (BINOP, cmlt, 0)
/* Implemented by aarch64_cm<cmp><mode>. */
BUILTIN_VSDQ_I_DI (BINOP, cmgeu, 0)
BUILTIN_VSDQ_I_DI (BINOP, cmgtu, 0)
BUILTIN_VSDQ_I_DI (TST, cmtst, 0)
/* Implemented by reduc_<sur>plus_<mode>. */
BUILTIN_VALL (UNOP, reduc_splus_, 10)
BUILTIN_VDQ (UNOP, reduc_uplus_, 10)

439
gcc/config/aarch64/arm_neon.h
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