constraints.md (Pe): New constraint.
2012-04-13 Joey Ye <joey.ye@arm.com> * config/arm/constraints.md (Pe): New constraint. * config/arm/arm.md: New split for imm 256-510. testsuite: * gcc.target/arm/thumb1-imm.c: New testcase. From-SVN: r186406
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2012-04-13 Joey Ye <joey.ye@arm.com>
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* config/arm/constraints.md (Pe): New constraint.
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* config/arm/arm.md: New split for imm 256-510.
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2012-04-13 Terry Guo <terry.guo@arm.com>
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* config/arm/arm-cores.def: Added core cortex-m0plus.
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@ -5652,6 +5652,21 @@
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}"
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)
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;; For thumb1 split imm move [256-510] into mov [1-255] and add #255
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(define_split
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[(set (match_operand:SI 0 "register_operand" "")
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(match_operand:SI 1 "const_int_operand" ""))]
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"TARGET_THUMB1 && satisfies_constraint_Pe (operands[1])"
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[(set (match_dup 2) (match_dup 1))
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(set (match_dup 0) (plus:SI (match_dup 2) (match_dup 3)))]
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"
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{
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operands[1] = GEN_INT (INTVAL (operands[1]) - 255);
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operands[2] = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];
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operands[3] = GEN_INT (255);
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}"
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)
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;; When generating pic, we need to load the symbol offset into a register.
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;; So that the optimizer does not confuse this with a normal symbol load
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;; we use an unspec. The offset will be loaded from a constant pool entry,
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@ -30,7 +30,7 @@
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;; The following multi-letter normal constraints have been used:
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;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di, Dt, Dz
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;; in Thumb-1 state: Pa, Pb, Pc, Pd
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;; in Thumb-1 state: Pa, Pb, Pc, Pd, Pe
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;; in Thumb-2 state: Pj, PJ, Ps, Pt, Pu, Pv, Pw, Px, Py
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;; The following memory constraints have been used:
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@ -172,6 +172,11 @@
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(and (match_code "const_int")
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(match_test "TARGET_THUMB1 && ival >= 0 && ival <= 7")))
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(define_constraint "Pe"
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"@internal In Thumb-1 state a constant in the range 256 to +510"
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(and (match_code "const_int")
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(match_test "TARGET_THUMB1 && ival >= 256 && ival <= 510")))
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(define_constraint "Ps"
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"@internal In Thumb-2 state a constant in the range -255 to +255"
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(and (match_code "const_int")
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@ -1,3 +1,7 @@
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2012-04-13 Joey Ye <joey.ye@arm.com>
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* gcc.target/arm/thumb1-imm.c: New testcase.
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2012-04-12 Uros Bizjak <ubizjak@gmail.com>
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PR target/52932
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10
gcc/testsuite/gcc.target/arm/thumb1-imm.c
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10
gcc/testsuite/gcc.target/arm/thumb1-imm.c
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/* Check for thumb1 imm [255-510] moves. */
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/* { dg-require-effective-target arm_thumb1_ok } */
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int f()
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{
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return 257;
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}
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/* { dg-final { scan-assembler-not "ldr" } } */
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