Add RDRND, F16C and FSGSBASE support to -march=native

Backport from mainline
	* config/i386/driver-i386.c (host_detect_local_cpu): Support
	RDRND, F16C and FSGSBASE.

From-SVN: r187697
This commit is contained in:
H.J. Lu 2012-05-20 23:10:57 +00:00 committed by H.J. Lu
parent e7eca5b668
commit 57749da311
2 changed files with 17 additions and 1 deletions

View File

@ -1,3 +1,11 @@
2012-05-20 H.J. Lu <hongjiu.lu@intel.com>
Backport from mainline
2012-05-20 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/driver-i386.c (host_detect_local_cpu): Support
RDRND, F16C and FSGSBASE.
2012-05-19 Eric Botcazou <ebotcazou@adacore.com>
Backport from mainline

View File

@ -397,6 +397,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
unsigned int has_pclmul = 0, has_abm = 0, has_lwp = 0;
unsigned int has_fma = 0, has_fma4 = 0, has_xop = 0;
unsigned int has_bmi = 0, has_bmi2 = 0, has_tbm = 0, has_lzcnt = 0;
unsigned int has_rdrnd = 0, has_f16c = 0, has_fsgsbase = 0;
bool arch;
@ -444,6 +445,8 @@ const char *host_detect_local_cpu (int argc, const char **argv)
has_aes = ecx & bit_AES;
has_pclmul = ecx & bit_PCLMUL;
has_fma = ecx & bit_FMA;
has_f16c = ecx & bit_F16C;
has_rdrnd = ecx & bit_RDRND;
has_cmpxchg8b = edx & bit_CMPXCHG8B;
has_cmov = edx & bit_CMOV;
@ -458,6 +461,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
has_bmi = ebx & bit_BMI;
has_avx2 = ebx & bit_AVX2;
has_bmi2 = ebx & bit_BMI2;
has_fsgsbase = ebx & bit_FSGSBASE;
}
/* Check cpuid level of extended features. */
@ -726,10 +730,14 @@ const char *host_detect_local_cpu (int argc, const char **argv)
const char *sse4_2 = has_sse4_2 ? " -msse4.2" : " -mno-sse4.2";
const char *sse4_1 = has_sse4_1 ? " -msse4.1" : " -mno-sse4.1";
const char *lzcnt = has_lzcnt ? " -mlzcnt" : " -mno-lzcnt";
const char *rdrnd = has_rdrnd ? " -mrdrnd" : " -mno-rdrnd";
const char *f16c = has_f16c ? " -mf16c" : " -mno-f16c";
const char *fsgsbase = has_fsgsbase ? " -mfsgsbase" : " -mno-fsgsbase";
options = concat (options, cx16, sahf, movbe, ase, pclmul,
popcnt, abm, lwp, fma, fma4, xop, bmi, bmi2,
tbm, avx, avx2, sse4_2, sse4_1, lzcnt, NULL);
tbm, avx, avx2, sse4_2, sse4_1, lzcnt, rdrnd,
f16c, fsgsbase, NULL);
}
done: