i386.c (ix86_legitimize_address): Declare "changed" as bool.
* config/i386/i386.c (ix86_legitimize_address): Declare "changed" as bool. (ix86_expand_unary_operator): Declare "matching_memory" as bool. (ix86_avoid_jump_mispredicts): Declare "isjump" as bool. * config/i386/i386.c (ix86_reassociation_width): Remove unneeded variable "res". From-SVN: r219115
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@ -1,3 +1,15 @@
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2014-12-30 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.c (ix86_legitimize_address): Declare
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"changed" as bool.
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(ix86_expand_unary_operator): Declare "matching_memory" as bool.
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(ix86_avoid_jump_mispredicts): Declare "isjump" as bool.
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2014-12-30 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.c (ix86_reassociation_width): Remove unneeded
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variable "res".
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2014-12-30 Jan Hubicka <hubicka@ucw.cz>
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* ipa-inline-analysis.c (estimate_function_body_sizes): Do not
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@ -9009,7 +9009,7 @@ ix86_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p,
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rtx slot = XVECEXP (container, 0, i);
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if (REGNO (XEXP (slot, 0)) != FIRST_SSE_REG + (unsigned int) i
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|| INTVAL (XEXP (slot, 1)) != i * 16)
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need_temp = 1;
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need_temp = true;
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}
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}
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else
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@ -9021,7 +9021,7 @@ ix86_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p,
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rtx slot = XVECEXP (container, 0, i);
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if (REGNO (XEXP (slot, 0)) != (unsigned int) i
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|| INTVAL (XEXP (slot, 1)) != i * 8)
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need_temp = 1;
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need_temp = true;
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}
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}
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}
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@ -14291,7 +14291,7 @@ legitimize_pe_coff_symbol (rtx addr, bool inreg)
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static rtx
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ix86_legitimize_address (rtx x, rtx, machine_mode mode)
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{
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int changed = 0;
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bool changed = false;
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unsigned log;
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log = GET_CODE (x) == SYMBOL_REF ? SYMBOL_REF_TLS_MODEL (x) : 0;
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@ -14327,7 +14327,7 @@ ix86_legitimize_address (rtx x, rtx, machine_mode mode)
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&& CONST_INT_P (XEXP (x, 1))
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&& (unsigned HOST_WIDE_INT) INTVAL (XEXP (x, 1)) < 4)
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{
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changed = 1;
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changed = true;
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log = INTVAL (XEXP (x, 1));
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x = gen_rtx_MULT (Pmode, force_reg (Pmode, XEXP (x, 0)),
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GEN_INT (1 << log));
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@ -14341,7 +14341,7 @@ ix86_legitimize_address (rtx x, rtx, machine_mode mode)
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&& CONST_INT_P (XEXP (XEXP (x, 0), 1))
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&& (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (x, 0), 1)) < 4)
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{
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changed = 1;
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changed = true;
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log = INTVAL (XEXP (XEXP (x, 0), 1));
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XEXP (x, 0) = gen_rtx_MULT (Pmode,
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force_reg (Pmode, XEXP (XEXP (x, 0), 0)),
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@ -14352,7 +14352,7 @@ ix86_legitimize_address (rtx x, rtx, machine_mode mode)
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&& CONST_INT_P (XEXP (XEXP (x, 1), 1))
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&& (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (x, 1), 1)) < 4)
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{
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changed = 1;
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changed = true;
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log = INTVAL (XEXP (XEXP (x, 1), 1));
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XEXP (x, 1) = gen_rtx_MULT (Pmode,
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force_reg (Pmode, XEXP (XEXP (x, 1), 0)),
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@ -14363,7 +14363,7 @@ ix86_legitimize_address (rtx x, rtx, machine_mode mode)
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if (GET_CODE (XEXP (x, 1)) == MULT)
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{
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std::swap (XEXP (x, 0), XEXP (x, 1));
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changed = 1;
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changed = true;
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}
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/* Canonicalize (plus (mult (reg) (const)) (plus (reg) (const)))
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@ -14372,7 +14372,7 @@ ix86_legitimize_address (rtx x, rtx, machine_mode mode)
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similar optimizations. */
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if (GET_CODE (XEXP (x, 0)) == MULT && GET_CODE (XEXP (x, 1)) == PLUS)
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{
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changed = 1;
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changed = true;
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x = gen_rtx_PLUS (Pmode,
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gen_rtx_PLUS (Pmode, XEXP (x, 0),
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XEXP (XEXP (x, 1), 0)),
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@ -14405,7 +14405,7 @@ ix86_legitimize_address (rtx x, rtx, machine_mode mode)
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if (constant)
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{
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changed = 1;
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changed = true;
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x = gen_rtx_PLUS (Pmode,
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gen_rtx_PLUS (Pmode, XEXP (XEXP (x, 0), 0),
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XEXP (XEXP (XEXP (x, 0), 1), 0)),
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@ -14419,13 +14419,13 @@ ix86_legitimize_address (rtx x, rtx, machine_mode mode)
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if (GET_CODE (XEXP (x, 0)) == MULT)
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{
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changed = 1;
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changed = true;
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XEXP (x, 0) = copy_addr_to_reg (XEXP (x, 0));
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}
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if (GET_CODE (XEXP (x, 1)) == MULT)
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{
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changed = 1;
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changed = true;
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XEXP (x, 1) = copy_addr_to_reg (XEXP (x, 1));
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}
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@ -14436,7 +14436,7 @@ ix86_legitimize_address (rtx x, rtx, machine_mode mode)
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if (flag_pic && SYMBOLIC_CONST (XEXP (x, 1)))
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{
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changed = 1;
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changed = true;
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x = legitimize_pic_address (x, 0);
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}
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@ -18068,7 +18068,7 @@ void
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ix86_expand_unary_operator (enum rtx_code code, machine_mode mode,
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rtx operands[])
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{
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int matching_memory;
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bool matching_memory = false;
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rtx src, dst, op, clob;
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dst = operands[0];
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@ -18076,11 +18076,10 @@ ix86_expand_unary_operator (enum rtx_code code, machine_mode mode,
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/* If the destination is memory, and we do not have matching source
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operands, do things in registers. */
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matching_memory = 0;
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if (MEM_P (dst))
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{
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if (rtx_equal_p (dst, src))
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matching_memory = 1;
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matching_memory = true;
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else
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dst = gen_reg_rtx (mode);
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}
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@ -43084,7 +43083,7 @@ ix86_avoid_jump_mispredicts (void)
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{
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rtx_insn *insn, *start = get_insns ();
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int nbytes = 0, njumps = 0;
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int isjump = 0;
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bool isjump = false;
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/* Look for all minimal intervals of instructions containing 4 jumps.
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The intervals are bounded by START and INSN. NBYTES is the total
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start = NEXT_INSN (start);
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if ((JUMP_P (start) && asm_noperands (PATTERN (start)) < 0)
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|| CALL_P (start))
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njumps--, isjump = 1;
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njumps--, isjump = true;
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else
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isjump = 0;
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isjump = false;
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nbytes -= min_insn_size (start);
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}
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}
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start = NEXT_INSN (start);
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if ((JUMP_P (start) && asm_noperands (PATTERN (start)) < 0)
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|| CALL_P (start))
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njumps--, isjump = 1;
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njumps--, isjump = true;
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else
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isjump = 0;
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isjump = false;
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nbytes -= min_insn_size (start);
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}
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gcc_assert (njumps >= 0);
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@ -51014,8 +51013,6 @@ has_dispatch (rtx_insn *insn, int action)
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static int
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ix86_reassociation_width (unsigned int, machine_mode mode)
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{
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int res = 1;
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/* Vector part. */
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if (VECTOR_MODE_P (mode))
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{
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@ -51027,11 +51024,11 @@ ix86_reassociation_width (unsigned int, machine_mode mode)
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/* Scalar part. */
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if (INTEGRAL_MODE_P (mode) && TARGET_REASSOC_INT_TO_PARALLEL)
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res = 2;
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return 2;
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else if (FLOAT_MODE_P (mode) && TARGET_REASSOC_FP_TO_PARALLEL)
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res = 2;
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return res;
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return 2;
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else
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return 1;
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}
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/* ??? No autovectorization into MMX or 3DNOW until we can reliably
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