re PR target/79282 ([7 Regresion] FAIL: gcc.target/arm/neon-for-64bits-1.c scan-assembler-times vshr 0)
2017-02-14 Vladimir Makarov <vmakarov@redhat.com> PR target/79282 * lra-int.h (struct lra_operand_data, struct lra_insn_reg): Add member early_clobber_alts. * lra-lives.c (reg_early_clobber_p): New. (process_bb_lives): Use it. * lra.c (new_insn_reg): New arg early_clobber_alts. Use it. (debug_operand_data): Initialize early_clobber_alts. (setup_operand_alternative): Set up early_clobber_alts. (collect_non_operand_hard_regs): Ditto. Pass early clobber alternatives to new_insn_reg. (add_regs_to_insn_regno_info): Add arg early_clobber_alts. Use it. (lra_update_insn_regno_info): Pass the new arg. From-SVN: r245459
This commit is contained in:
Vladimir Makarov
Vladimir Makarov
parent
2932fe90d5
commit
584898ee80
@ -1,3 +1,19 @@
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2017-02-14 Vladimir Makarov <vmakarov@redhat.com>
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PR target/79282
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* lra-int.h (struct lra_operand_data, struct lra_insn_reg): Add
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member early_clobber_alts.
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* lra-lives.c (reg_early_clobber_p): New.
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(process_bb_lives): Use it.
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* lra.c (new_insn_reg): New arg early_clobber_alts. Use it.
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(debug_operand_data): Initialize early_clobber_alts.
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(setup_operand_alternative): Set up early_clobber_alts.
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(collect_non_operand_hard_regs): Ditto. Pass early clobber
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alternatives to new_insn_reg.
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(add_regs_to_insn_regno_info): Add arg early_clobber_alts. Use
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it.
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(lra_update_insn_regno_info): Pass the new arg.
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2017-02-14 Jakub Jelinek <jakub@redhat.com>
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PR middle-end/79505
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@ -130,6 +130,8 @@ struct lra_operand_data
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{
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/* The machine description constraint string of the operand. */
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const char *constraint;
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/* Alternatives for which early_clobber can be true. */
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alternative_mask early_clobber_alts;
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/* It is taken only from machine description (which is different
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from recog_data.operand_mode) and can be of VOIDmode. */
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ENUM_BITFIELD(machine_mode) mode : 16;
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@ -150,6 +152,8 @@ struct lra_operand_data
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/* Info about register occurrence in an insn. */
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struct lra_insn_reg
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{
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/* Alternatives for which early_clobber can be true. */
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alternative_mask early_clobber_alts;
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/* The biggest mode through which the insn refers to the register
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occurrence (remember the register can be accessed through a
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subreg in the insn). */
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@ -586,6 +586,16 @@ check_pseudos_live_through_calls (int regno,
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SET_HARD_REG_SET (lra_reg_info[regno].conflict_hard_regs);
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}
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/* Return true if insn REG is an early clobber operand in alternative
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NALT. Negative NALT means that we don't know the current insn
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alternative. So assume the worst. */
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static inline bool
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reg_early_clobber_p (const struct lra_insn_reg *reg, int n_alt)
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{
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return (reg->early_clobber
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&& (n_alt < 0 || TEST_BIT (reg->early_clobber_alts, n_alt)));
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}
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/* Process insns of the basic block BB to update pseudo live ranges,
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pseudo hard register conflicts, and insn notes. We do it on
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backward scan of BB insns. CURR_POINT is the program point where
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@ -638,7 +648,7 @@ process_bb_lives (basic_block bb, int &curr_point, bool dead_insn_p)
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FOR_BB_INSNS_REVERSE_SAFE (bb, curr_insn, next)
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{
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bool call_p;
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int dst_regno, src_regno;
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int n_alt, dst_regno, src_regno;
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rtx set;
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struct lra_insn_reg *reg;
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@ -647,9 +657,10 @@ process_bb_lives (basic_block bb, int &curr_point, bool dead_insn_p)
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curr_id = lra_get_insn_recog_data (curr_insn);
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curr_static_id = curr_id->insn_static_data;
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n_alt = curr_id->used_insn_alternative;
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if (lra_dump_file != NULL)
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fprintf (lra_dump_file, " Insn %u: point = %d\n",
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INSN_UID (curr_insn), curr_point);
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fprintf (lra_dump_file, " Insn %u: point = %d, n_alt = %d\n",
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INSN_UID (curr_insn), curr_point, n_alt);
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set = single_set (curr_insn);
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@ -818,13 +829,15 @@ process_bb_lives (basic_block bb, int &curr_point, bool dead_insn_p)
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/* See which defined values die here. */
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for (reg = curr_id->regs; reg != NULL; reg = reg->next)
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if (reg->type == OP_OUT && ! reg->early_clobber && ! reg->subreg_p)
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if (reg->type == OP_OUT
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&& ! reg_early_clobber_p (reg, n_alt) && ! reg->subreg_p)
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need_curr_point_incr
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|= mark_regno_dead (reg->regno, reg->biggest_mode,
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curr_point);
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for (reg = curr_static_id->hard_regs; reg != NULL; reg = reg->next)
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if (reg->type == OP_OUT && ! reg->early_clobber && ! reg->subreg_p)
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if (reg->type == OP_OUT
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&& ! reg_early_clobber_p (reg, n_alt) && ! reg->subreg_p)
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make_hard_regno_dead (reg->regno);
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if (curr_id->arg_hard_regs != NULL)
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@ -901,13 +914,15 @@ process_bb_lives (basic_block bb, int &curr_point, bool dead_insn_p)
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/* Mark early clobber outputs dead. */
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for (reg = curr_id->regs; reg != NULL; reg = reg->next)
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if (reg->type == OP_OUT && reg->early_clobber && ! reg->subreg_p)
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if (reg->type == OP_OUT
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&& reg_early_clobber_p (reg, n_alt) && ! reg->subreg_p)
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need_curr_point_incr
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|= mark_regno_dead (reg->regno, reg->biggest_mode,
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curr_point);
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for (reg = curr_static_id->hard_regs; reg != NULL; reg = reg->next)
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if (reg->type == OP_OUT && reg->early_clobber && ! reg->subreg_p)
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if (reg->type == OP_OUT
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&& reg_early_clobber_p (reg, n_alt) && ! reg->subreg_p)
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make_hard_regno_dead (reg->regno);
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if (need_curr_point_incr)
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67
gcc/lra.c
67
gcc/lra.c
@ -529,15 +529,19 @@ lra_update_dups (lra_insn_recog_data_t id, signed char *nops)
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/* Pools for insn reg info. */
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object_allocator<lra_insn_reg> lra_insn_reg_pool ("insn regs");
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/* Create LRA insn related info about a reference to REGNO in INSN with
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TYPE (in/out/inout), biggest reference mode MODE, flag that it is
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reference through subreg (SUBREG_P), flag that is early clobbered
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in the insn (EARLY_CLOBBER), and reference to the next insn reg
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info (NEXT). */
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/* Create LRA insn related info about a reference to REGNO in INSN
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with TYPE (in/out/inout), biggest reference mode MODE, flag that it
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is reference through subreg (SUBREG_P), flag that is early
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clobbered in the insn (EARLY_CLOBBER), and reference to the next
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insn reg info (NEXT). If REGNO can be early clobbered,
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alternatives in which it can be early clobbered are given by
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EARLY_CLOBBER_ALTS. */
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static struct lra_insn_reg *
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new_insn_reg (rtx_insn *insn, int regno, enum op_type type,
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machine_mode mode,
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bool subreg_p, bool early_clobber, struct lra_insn_reg *next)
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bool subreg_p, bool early_clobber,
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alternative_mask early_clobber_alts,
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struct lra_insn_reg *next)
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{
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lra_insn_reg *ir = lra_insn_reg_pool.allocate ();
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ir->type = type;
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@ -547,6 +551,7 @@ new_insn_reg (rtx_insn *insn, int regno, enum op_type type,
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lra_reg_info[regno].biggest_mode = mode;
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ir->subreg_p = subreg_p;
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ir->early_clobber = early_clobber;
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ir->early_clobber_alts = early_clobber_alts;
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ir->regno = regno;
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ir->next = next;
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return ir;
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@ -590,6 +595,7 @@ struct lra_static_insn_data *insn_code_data[NUM_INSN_CODES];
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static struct lra_operand_data debug_operand_data =
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{
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NULL, /* alternative */
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0, /* early_clobber_alts */
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VOIDmode, /* We are not interesting in the operand mode. */
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OP_IN,
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0, 0, 0, 0
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@ -771,6 +777,7 @@ setup_operand_alternative (lra_insn_recog_data_t data,
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static_data->operand_alternative = op_alt;
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for (i = 0; i < nop; i++)
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{
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static_data->operand[i].early_clobber_alts = 0;
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static_data->operand[i].early_clobber = false;
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static_data->operand[i].is_address = false;
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if (static_data->operand[i].constraint[0] == '%')
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@ -788,6 +795,8 @@ setup_operand_alternative (lra_insn_recog_data_t data,
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for (i = 0; i < nop; i++, op_alt++)
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{
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static_data->operand[i].early_clobber |= op_alt->earlyclobber;
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if (op_alt->earlyclobber)
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static_data->operand[i].early_clobber_alts |= (alternative_mask) 1 << j;
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static_data->operand[i].is_address |= op_alt->is_address;
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}
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}
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@ -847,8 +856,11 @@ collect_non_operand_hard_regs (rtx *x, lra_insn_recog_data_t data,
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{
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if (curr->type != type)
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curr->type = OP_INOUT;
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if (curr->early_clobber != early_clobber)
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curr->early_clobber = true;
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if (early_clobber)
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{
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curr->early_clobber = true;
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curr->early_clobber_alts = ALL_ALTERNATIVES;
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}
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break;
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}
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if (curr == NULL)
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@ -864,7 +876,8 @@ collect_non_operand_hard_regs (rtx *x, lra_insn_recog_data_t data,
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&& regno <= LAST_STACK_REG));
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#endif
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list = new_insn_reg (data->insn, regno, type, mode, subreg_p,
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early_clobber, list);
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early_clobber,
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early_clobber ? ALL_ALTERNATIVES : 0, list);
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}
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}
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return list;
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@ -1395,10 +1408,13 @@ lra_get_copy (int n)
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/* Process X of insn UID recursively and add info (operand type is
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given by TYPE, flag of that it is early clobber is EARLY_CLOBBER)
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about registers in X to the insn DATA. */
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about registers in X to the insn DATA. If X can be early clobbered,
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alternatives in which it can be early clobbered are given by
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EARLY_CLOBBER_ALTS. */
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static void
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add_regs_to_insn_regno_info (lra_insn_recog_data_t data, rtx x, int uid,
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enum op_type type, bool early_clobber)
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enum op_type type, bool early_clobber,
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alternative_mask early_clobber_alts)
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{
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int i, j, regno;
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bool subreg_p;
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@ -1430,7 +1446,8 @@ add_regs_to_insn_regno_info (lra_insn_recog_data_t data, rtx x, int uid,
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if (bitmap_set_bit (&lra_reg_info[regno].insn_bitmap, uid))
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{
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data->regs = new_insn_reg (data->insn, regno, type, mode, subreg_p,
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early_clobber, data->regs);
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early_clobber, early_clobber_alts,
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data->regs);
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return;
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}
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else
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@ -1443,13 +1460,14 @@ add_regs_to_insn_regno_info (lra_insn_recog_data_t data, rtx x, int uid,
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structure. */
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data->regs = new_insn_reg (data->insn, regno, type, mode,
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subreg_p, early_clobber,
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data->regs);
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early_clobber_alts, data->regs);
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else
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{
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if (curr->type != type)
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curr->type = OP_INOUT;
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if (curr->early_clobber != early_clobber)
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curr->early_clobber = true;
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curr->early_clobber_alts |= early_clobber_alts;
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}
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return;
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}
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@ -1460,20 +1478,20 @@ add_regs_to_insn_regno_info (lra_insn_recog_data_t data, rtx x, int uid,
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switch (code)
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{
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case SET:
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add_regs_to_insn_regno_info (data, SET_DEST (x), uid, OP_OUT, false);
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add_regs_to_insn_regno_info (data, SET_SRC (x), uid, OP_IN, false);
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add_regs_to_insn_regno_info (data, SET_DEST (x), uid, OP_OUT, false, 0);
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add_regs_to_insn_regno_info (data, SET_SRC (x), uid, OP_IN, false, 0);
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break;
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case CLOBBER:
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/* We treat clobber of non-operand hard registers as early
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clobber (the behavior is expected from asm). */
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add_regs_to_insn_regno_info (data, XEXP (x, 0), uid, OP_OUT, true);
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add_regs_to_insn_regno_info (data, XEXP (x, 0), uid, OP_OUT, true, ALL_ALTERNATIVES);
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break;
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case PRE_INC: case PRE_DEC: case POST_INC: case POST_DEC:
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add_regs_to_insn_regno_info (data, XEXP (x, 0), uid, OP_INOUT, false);
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add_regs_to_insn_regno_info (data, XEXP (x, 0), uid, OP_INOUT, false, 0);
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break;
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case PRE_MODIFY: case POST_MODIFY:
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add_regs_to_insn_regno_info (data, XEXP (x, 0), uid, OP_INOUT, false);
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add_regs_to_insn_regno_info (data, XEXP (x, 1), uid, OP_IN, false);
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add_regs_to_insn_regno_info (data, XEXP (x, 0), uid, OP_INOUT, false, 0);
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add_regs_to_insn_regno_info (data, XEXP (x, 1), uid, OP_IN, false, 0);
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break;
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default:
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if ((code != PARALLEL && code != EXPR_LIST) || type != OP_OUT)
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@ -1494,12 +1512,12 @@ add_regs_to_insn_regno_info (lra_insn_recog_data_t data, rtx x, int uid,
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for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
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{
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if (fmt[i] == 'e')
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add_regs_to_insn_regno_info (data, XEXP (x, i), uid, type, false);
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add_regs_to_insn_regno_info (data, XEXP (x, i), uid, type, false, 0);
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else if (fmt[i] == 'E')
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{
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for (j = XVECLEN (x, i) - 1; j >= 0; j--)
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add_regs_to_insn_regno_info (data, XVECEXP (x, i, j), uid,
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type, false);
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type, false, 0);
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}
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}
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}
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@ -1590,10 +1608,11 @@ lra_update_insn_regno_info (rtx_insn *insn)
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for (i = static_data->n_operands - 1; i >= 0; i--)
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add_regs_to_insn_regno_info (data, *data->operand_loc[i], uid,
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static_data->operand[i].type,
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static_data->operand[i].early_clobber);
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static_data->operand[i].early_clobber,
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static_data->operand[i].early_clobber_alts);
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if ((code = GET_CODE (PATTERN (insn))) == CLOBBER || code == USE)
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add_regs_to_insn_regno_info (data, XEXP (PATTERN (insn), 0), uid,
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code == USE ? OP_IN : OP_OUT, false);
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code == USE ? OP_IN : OP_OUT, false, 0);
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if (CALL_P (insn))
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/* On some targets call insns can refer to pseudos in memory in
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CALL_INSN_FUNCTION_USAGE list. Process them in order to
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@ -1605,7 +1624,7 @@ lra_update_insn_regno_info (rtx_insn *insn)
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if (((code = GET_CODE (XEXP (link, 0))) == USE || code == CLOBBER)
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&& MEM_P (XEXP (XEXP (link, 0), 0)))
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add_regs_to_insn_regno_info (data, XEXP (XEXP (link, 0), 0), uid,
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code == USE ? OP_IN : OP_OUT, false);
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code == USE ? OP_IN : OP_OUT, false, 0);
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if (NONDEBUG_INSN_P (insn))
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setup_insn_reg_info (data, freq);
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}
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