(casesi): Use emit_jump_insn to emit casesi0 pattern.
(xorsi3): Remove `r' from output template. (movstrsi recognizer): Add `+' to operand 0 & 1 constraints. From-SVN: r2138
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@ -749,7 +749,7 @@
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(set_attr "length" "1")])
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(define_insn ""
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[(set (match_operand:SI 0 "register_operand" "=a,?*r")
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[(set (match_operand:SI 0 "register_operand" "=a,&?*r")
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(plus:SI (match_operand:SI 1 "register_operand" "r,r")
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(high:SI (match_operand 2 "" ""))))]
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""
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@ -944,8 +944,8 @@
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;; therefore it is forced to operand 2. If the count is compile-time
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;; determined, we need two scratch registers for the unrolled code.
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(define_insn ""
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r"))
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(mem:BLK (match_operand:SI 1 "register_operand" "r,r")))
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "+r,r"))
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(mem:BLK (match_operand:SI 1 "register_operand" "+r,r")))
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(clobber (match_dup 0))
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(clobber (match_dup 1))
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(clobber (match_scratch:SI 2 "=r,r")) ;loop cnt/item tmp
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@ -1667,7 +1667,7 @@
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(xor:SI (match_operand:SI 1 "register_operand" "%r")
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(match_operand:SI 2 "register_operand" "r")))]
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""
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"xor %r1,%2,%0")
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"xor %1,%2,%0")
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(define_insn "negdi2"
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[(set (match_operand:DI 0 "register_operand" "=r")
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@ -2057,8 +2057,8 @@
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if (!INT_11_BITS (operands[2]))
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operands[2] = force_reg (SImode, operands[2]);
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emit_insn (gen_casesi0 (operands[0], operands[2],
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operands[3], operands[4]));
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emit_jump_insn (gen_casesi0 (operands[0], operands[2],
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operands[3], operands[4]));
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DONE;
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}")
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