aarch64.c (doloop_end): New pattern.
* config/aarch64/aarch64.c (doloop_end): New pattern. * config/aarch64/aarch64.md (TARGET_CAN_USE_DOLOOP_P): Implement. From-SVN: r217717
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@ -1,3 +1,8 @@
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2014-11-18 Felix Yang <felix.yang@huawei.com>
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* config/aarch64/aarch64.c (doloop_end): New pattern.
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* config/aarch64/aarch64.md (TARGET_CAN_USE_DOLOOP_P): Implement.
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2014-11-18 Jason Merrill <jason@redhat.com>
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* tree.c (warn_deprecated_use): Show declaration with inform.
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@ -10605,6 +10605,9 @@ aarch64_gen_ccmp_next (rtx prev, int cmp_code, rtx op0, rtx op1, int bit_code)
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#define TARGET_USE_BY_PIECES_INFRASTRUCTURE_P \
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aarch64_use_by_pieces_infrastructure_p
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#undef TARGET_CAN_USE_DOLOOP_P
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#define TARGET_CAN_USE_DOLOOP_P can_use_doloop_if_innermost
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struct gcc_target targetm = TARGET_INITIALIZER;
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#include "gt-aarch64.h"
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@ -4169,6 +4169,43 @@
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[(set_attr "type" "mrs")])
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;; Define the subtract-one-and-jump insns so loop.c
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;; knows what to generate.
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(define_expand "doloop_end"
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[(use (match_operand 0 "" "")) ; loop pseudo
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(use (match_operand 1 "" ""))] ; label
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"optimize > 0 && flag_modulo_sched"
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{
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rtx s0;
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rtx bcomp;
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rtx loc_ref;
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rtx cc_reg;
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rtx insn;
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rtx cmp;
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/* Currently SMS relies on the do-loop pattern to recognize loops
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where (1) the control part consists of all insns defining and/or
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using a certain 'count' register and (2) the loop count can be
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adjusted by modifying this register prior to the loop.
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??? The possible introduction of a new block to initialize the
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new IV can potentially affect branch optimizations. */
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if (GET_MODE (operands[0]) != DImode)
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FAIL;
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s0 = operands [0];
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insn = emit_insn (gen_adddi3_compare0 (s0, s0, GEN_INT (-1)));
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cmp = XVECEXP (PATTERN (insn), 0, 0);
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cc_reg = SET_DEST (cmp);
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bcomp = gen_rtx_NE (VOIDmode, cc_reg, const0_rtx);
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loc_ref = gen_rtx_LABEL_REF (VOIDmode, operands [1]);
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emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
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gen_rtx_IF_THEN_ELSE (VOIDmode, bcomp,
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loc_ref, pc_rtx)));
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DONE;
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})
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;; AdvSIMD Stuff
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(include "aarch64-simd.md")
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