re PR target/78056 (build failure on Power7)
gcc/testsuite/ChangeLog: 2017-01-04 Kelvin Nilsen <kelvin@gcc.gnu.org> PR target/78056 * gcc.target/powerpc/pr78056-1.c: New test. * gcc.target/powerpc/pr78056-2.c: New test. * gcc.target/powerpc/pr78056-3.c: New test. * gcc.target/powerpc/pr78056-4.c: New test. * gcc.target/powerpc/pr78056-5.c: New test. * gcc.target/powerpc/pr78056-6.c: New test. * gcc.target/powerpc/pr78056-7.c: New test. * gcc.target/powerpc/pr78056-8.c: New test. * lib/target-supports.exp (check_effective_target_powerpc_popcntb_ok): New procedure to test whether the effective target supports the popcntb instruction. gcc/ChangeLog: 2017-01-04 Kelvin Nilsen <kelvin@gcc.gnu.org> PR target/78056 * doc/sourcebuild.texi (PowerPC-specific attributes): Add documentation of the powerpc_popcntb_ok attribute. * config/rs6000/rs6000.c (rs6000_option_override_internal): Add code to issue warning messages if a requested CPU configuration is not supported by the binary (assembler and loader) toolchain. (spe_init_builtins): Add two assertions to prevent ICE if attempt is made to define a built-in function that has been disabled. (paired_init_builtins): Add assertion to prevent ICE if attempt is made to define a built-in function that has been disabled. (altivec_init_builtins): Add comment explaining why definition of the DST built-in functions is not preceded by an assertion check. Add assertions to prevent ICE if attempts are made to define an altivec predicate or an abs* built-in function that has been disabled. (htm_init_builtins): Add comment explaining why definition of the htm built-in functions is not preceded by an assertion check. From-SVN: r244068
This commit is contained in:
Kelvin Nilsen
parent
8194635af7
commit
598bd6878a
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@ -1,3 +1,23 @@
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2017-01-04 Kelvin Nilsen <kelvin@gcc.gnu.org>
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PR target/78056
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* doc/sourcebuild.texi (PowerPC-specific attributes): Add
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documentation of the powerpc_popcntb_ok attribute.
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* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
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code to issue warning messages if a requested CPU configuration is
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not supported by the binary (assembler and loader) toolchain.
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(spe_init_builtins): Add two assertions to prevent ICE if attempt is
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made to define a built-in function that has been disabled.
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(paired_init_builtins): Add assertion to prevent ICE if attempt is
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made to define a built-in function that has been disabled.
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(altivec_init_builtins): Add comment explaining why definition
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of the DST built-in functions is not preceded by an assertion
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check. Add assertions to prevent ICE if attempts are made to
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define an altivec predicate or an abs* built-in function that has
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been disabled.
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(htm_init_builtins): Add comment explaining why definition of the
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htm built-in functions is not preceded by an assertion check.
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2017-01-04 Jeff Law <law@redhat.com>
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PR tree-optimizatin/67955
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@ -3934,6 +3934,67 @@ rs6000_option_override_internal (bool global_init_p)
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gcc_assert (cpu_index >= 0);
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if (have_cpu)
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{
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#ifndef HAVE_AS_POWER9
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if (processor_target_table[rs6000_cpu_index].processor
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== PROCESSOR_POWER9)
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{
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have_cpu = false;
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warning (0, "will not generate power9 instructions because "
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"assembler lacks power9 support");
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}
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#endif
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#ifndef HAVE_AS_POWER8
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if (processor_target_table[rs6000_cpu_index].processor
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== PROCESSOR_POWER8)
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{
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have_cpu = false;
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warning (0, "will not generate power8 instructions because "
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"assembler lacks power8 support");
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}
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#endif
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#ifndef HAVE_AS_POPCNTD
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if (processor_target_table[rs6000_cpu_index].processor
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== PROCESSOR_POWER7)
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{
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have_cpu = false;
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warning (0, "will not generate power7 instructions because "
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"assembler lacks power7 support");
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}
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#endif
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#ifndef HAVE_AS_DFP
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if (processor_target_table[rs6000_cpu_index].processor
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== PROCESSOR_POWER6)
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{
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have_cpu = false;
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warning (0, "will not generate power6 instructions because "
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"assembler lacks power6 support");
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}
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#endif
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#ifndef HAVE_AS_POPCNTB
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if (processor_target_table[rs6000_cpu_index].processor
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== PROCESSOR_POWER5)
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{
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have_cpu = false;
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warning (0, "will not generate power5 instructions because "
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"assembler lacks power5 support");
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}
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#endif
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if (!have_cpu)
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{
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/* PowerPC 64-bit LE requires at least ISA 2.07. */
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const char *default_cpu = (!TARGET_POWERPC64
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? "powerpc"
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: (BYTES_BIG_ENDIAN
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? "powerpc64"
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: "powerpc64le"));
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rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (default_cpu);
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}
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}
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/* If we have a cpu, either through an explicit -mcpu=<xxx> or if the
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compiler was configured with --with-cpu=<xxx>, replace all of the ISA bits
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with those from the cpu, except for options that were explicitly set. If
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@ -17371,6 +17432,8 @@ spe_init_builtins (void)
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continue;
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}
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/* Cannot define builtin if the instruction is disabled. */
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gcc_assert (d->icode != CODE_FOR_nothing);
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switch (insn_data[d->icode].operand[1].mode)
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{
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case V2SImode:
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@ -17401,6 +17464,8 @@ spe_init_builtins (void)
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continue;
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}
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/* Cannot define builtin if the instruction is disabled. */
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gcc_assert (d->icode != CODE_FOR_nothing);
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switch (insn_data[d->icode].operand[1].mode)
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{
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case V2SImode:
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@ -17468,6 +17533,9 @@ paired_init_builtins (void)
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continue;
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}
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/* Cannot define builtin if the instruction is disabled. */
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gcc_assert (d->icode != CODE_FOR_nothing);
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if (TARGET_DEBUG_BUILTIN)
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fprintf (stderr, "paired pred #%d, insn = %s [%d], mode = %s\n",
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(int)i, get_insn_name (d->icode), (int)d->icode,
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@ -17837,6 +17905,8 @@ altivec_init_builtins (void)
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{
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HOST_WIDE_INT mask = d->mask;
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/* It is expected that these dst built-in functions may have
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d->icode equal to CODE_FOR_nothing. */
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if ((mask & builtin_mask) != mask)
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{
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if (TARGET_DEBUG_BUILTIN)
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@ -17866,7 +17936,11 @@ altivec_init_builtins (void)
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if (rs6000_overloaded_builtin_p (d->code))
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mode1 = VOIDmode;
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else
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mode1 = insn_data[d->icode].operand[1].mode;
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{
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/* Cannot define builtin if the instruction is disabled. */
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gcc_assert (d->icode != CODE_FOR_nothing);
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mode1 = insn_data[d->icode].operand[1].mode;
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}
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switch (mode1)
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{
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@ -17914,6 +17988,8 @@ altivec_init_builtins (void)
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continue;
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}
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/* Cannot define builtin if the instruction is disabled. */
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gcc_assert (d->icode != CODE_FOR_nothing);
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mode0 = insn_data[d->icode].operand[0].mode;
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switch (mode0)
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@ -18101,6 +18177,9 @@ htm_init_builtins (void)
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tree rettype;
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tree argtype;
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/* It is expected that these htm built-in functions may have
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d->icode equal to CODE_FOR_nothing. */
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if (TARGET_32BIT && TARGET_POWERPC64)
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gpr_type_node = long_long_unsigned_type_node;
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else
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@ -1766,6 +1766,10 @@ PowerPC target supports @code{-mhtm}
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@item powerpc_p8vector_ok
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PowerPC target supports @code{-mpower8-vector}
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@item powerpc_popcntb_ok
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PowerPC target supports the @code{popcntb} instruction, indicating
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that this target supports @code{-mcpu=power5}.
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@item powerpc_ppu_ok
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PowerPC target supports @code{-mcpu=cell}.
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@ -1,3 +1,18 @@
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2017-01-04 Kelvin Nilsen <kelvin@gcc.gnu.org>
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PR target/78056
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* gcc.target/powerpc/pr78056-1.c: New test.
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* gcc.target/powerpc/pr78056-2.c: New test.
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* gcc.target/powerpc/pr78056-3.c: New test.
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* gcc.target/powerpc/pr78056-4.c: New test.
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* gcc.target/powerpc/pr78056-5.c: New test.
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* gcc.target/powerpc/pr78056-6.c: New test.
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* gcc.target/powerpc/pr78056-7.c: New test.
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* gcc.target/powerpc/pr78056-8.c: New test.
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* lib/target-supports.exp
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(check_effective_target_powerpc_popcntb_ok): New procedure to test
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whether the effective target supports the popcntb instruction.
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2017-01-03 Jeff Law <law@redhat.com>
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PR tree-optimization/67955
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@ -0,0 +1,18 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
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/* { dg-require-effective-target powerpc_p9vector_ok } */
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/* { dg-skip-if "" { powerpc*-*-aix* } } */
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/* { dg-options "-mcpu=power8" } */
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/* This test should succeed on both 32- and 64-bit configurations. */
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#include <altivec.h>
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/* Though the command line specifies power8 target, this function is
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to support power9. */
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__attribute__((target("cpu=power9")))
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int get_random ()
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{
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return __builtin_darn_32 ();
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}
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/* { dg-final { scan-assembler "darn" } } */
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@ -0,0 +1,19 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
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/* { dg-require-effective-target powerpc_p8vector_ok } */
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/* { dg-skip-if "" { powerpc_p9vector_ok } } */
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/* { dg-skip-if "" { powerpc*-*-aix* } } */
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/* { dg-options "-mcpu=power8" } */
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/* This test should succeed on both 32- and 64-bit configurations. */
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#include <altivec.h>
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/* Though the command line specifies power8 target, this function is
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to support power9. Expect an error message here because this target
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does not support power9. */
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__attribute__((target("cpu=power9")))
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int get_random ()
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{ /* { dg-warning "lacks power9 support" } */
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return __builtin_darn_32 (); /* { dg-warning "implicit declaration" } */
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}
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@ -0,0 +1,18 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
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/* { dg-require-effective-target powerpc_p8vector_ok } */
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/* { dg-skip-if "" { powerpc*-*-aix* } } */
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/* { dg-options "-mcpu=power7" } */
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/* This test should succeed on both 32- and 64-bit configurations. */
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#include <altivec.h>
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/* Test for the byte atomic operations on power8 using lbarx/stbcx. */
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__attribute__((target("cpu=power8")))
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char
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char_fetch_add_relaxed (char *ptr, int value)
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{
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return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);
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}
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/* { dg-final { scan-assembler-times "lbarx" 1 } } */
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@ -0,0 +1,20 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
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/* powerpc_vsx_ok represents power7 */
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/* { dg-require-effective-target powerpc_vsx_ok } */
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/* { dg-skip-if "" { powerpc_p8vector_ok } } */
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/* { dg-skip-if "" { powerpc*-*-aix* } } */
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/* { dg-options "-mcpu=power7" } */
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/* This test should succeed on both 32- and 64-bit configurations. */
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#include <altivec.h>
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/* Though the command line specifies power7 target, this function is
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to support power8, which will fail because this platform does not
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support power8. */
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__attribute__((target("cpu=power8")))
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char
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char_fetch_add_relaxed (char *ptr, int value)
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{ /* { dg-warning "lacks power8 support" } */
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return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED);
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}
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@ -0,0 +1,17 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */
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/* powerpc_vsx_ok represents power7 */
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/* { dg-require-effective-target powerpc_vsx_ok } */
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/* { dg-skip-if "" { powerpc*-*-aix* } } */
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/* { dg-options "-mcpu=power5" } */
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/* Though the command line specifies power5 target, this function is
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to support power7. */
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__attribute__((target("cpu=power7")))
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int
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div_we (int a, int b)
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{
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return __builtin_divwe (a, b);
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}
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/* { dg-final { scan-assembler-times "divwe " 1 } } */
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@ -0,0 +1,26 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */
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/* dfp_hw represents power 6 */
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/* { dg-require-effective-target dfp_hw } */
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/* powerpc_vsx_ok represents power7 */
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/* { dg-skip-if "" { powerpc_vsx_ok } } */
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/* { dg-skip-if "" { powerpc*-*-aix* } } */
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/* { dg-options "-mcpu=power6" } */
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/* This test should succeed on both 32- and 64-bit configurations. */
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#include <altivec.h>
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/* This test follows the pattern of pr78056-2.c, which has been
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* exercised with binutils 2.25. This test, however, has not
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* been exercised because the author of the test does not have access
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* to a development environment that succesfully bootstraps gcc
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* while at the same lacking assembler support for power 7. */
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/* Though the command line specifies power6 target, this function is
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to support power7. */
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__attribute__((target("cpu=power7")))
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int
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div_we (int a, int b)
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{ /* { dg-warning "lacks power7 support" } */
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return __builtin_divwe (a, b); /* { dg-warning "implicit declaration" } */
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}
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@ -0,0 +1,15 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */
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/* dfp_hw represents power 6 */
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/* { dg-require-effective-target dfp_hw } */
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/* { dg-skip-if "" { powerpc*-*-aix* } } */
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/* { dg-options "-mcpu=power5" } */
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/* Though the command line specifies power5 target, this function is
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to support power6. */
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__attribute__((target("cpu=power6")))
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double power6 (double a, double b)
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{
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return __builtin_copysign (a, b);
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}
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/* { dg-final { scan-assembler-times "fcpsgn" 1 } } */
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@ -0,0 +1,26 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */
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/* powerpc_popcntb_ok represents support for power 5. */
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/* { dg-require-effective-target powerpc_popcntb_ok } */
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/* dfp_hw represents support for power 6. */
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/* { dg-skip-if "" { dfp_hw } } */
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/* { dg-skip-if "" { powerpc*-*-aix* } } */
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/* { dg-options "-mcpu=power5" } */
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/* This test follows the pattern of pr78056-2.c, which has been
|
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* exercised with binutils 2.25. This test, however, has not
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* been exercised because the author of the test does not have access
|
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* to a development environment that succesfully bootstraps gcc
|
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* while at the same lacking assembler support for power 6. */
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/* This test should succeed on both 32- and 64-bit configurations. */
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/* Though the command line specifies power5 target, this function is
|
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to support power6. Expect an error message here because this target
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does not support power6. */
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__attribute__((target("cpu=power6")))
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/* fabs/fnabs/fsel */
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double normal1 (double a, double b)
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{ /* { dg-warning "lacks power6 support" } */
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return __builtin_copysign (a, b); /* { dg-warning "implicit declaration" } */
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}
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@ -2746,6 +2746,26 @@ proc check_effective_target_dfprt { } {
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}]
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}
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proc check_effective_target_powerpc_popcntb_ok { } {
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return [check_cached_effective_target powerpc_popcntb_ok {
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# Disable on Darwin.
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if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
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expr 0
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} else {
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check_runtime_nocache powerpc_popcntb_ok {
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volatile int r;
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volatile int a = 0x12345678;
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int main()
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{
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asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
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return 0;
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}
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} "-mcpu=power5"
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}
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}]
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}
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# Return 1 if the target supports executing DFP hardware instructions,
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# 0 otherwise. Cache the result.
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Reference in New Issue