mips.md (define_attr type): Add condmove.
* config/mips/mips.md (define_attr type): Add condmove. Use it for the conditional move patterns. * config/mips/5400.md (ir_vr54_move): Rename to ir_vr54_condmove. Check for condmove type. (ir_vr54_arith): Add move type. * config/mips/5500.md (ir_vr55_move, ir_vr55_arith): Likewise. * config/mips/sr71k.md (ir_sr70_move, ir_sr70_arith): Likewise. From-SVN: r69389
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
119dbb1fce
commit
5a2515e667
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@ -1,3 +1,13 @@
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2003-07-15 Richard Sandiford <rsandifo@redhat.com>
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* config/mips/mips.md (define_attr type): Add condmove. Use it for
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the conditional move patterns.
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* config/mips/5400.md (ir_vr54_move): Rename to ir_vr54_condmove.
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Check for condmove type.
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(ir_vr54_arith): Add move type.
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* config/mips/5500.md (ir_vr55_move, ir_vr55_arith): Likewise.
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* config/mips/sr71k.md (ir_sr70_move, ir_sr70_arith): Likewise.
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2003-07-15 Neil Booth <neil@daikokuya.co.uk>
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* c-opts.c (print_help): Remove.
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@ -44,11 +44,10 @@
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;; This reservation is for conditional move based on integer
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;; or floating point CC. This could probably use some refinement
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;; as "move" type attr seems to be overloaded in rtl.
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(define_insn_reservation "ir_vr54_move" 4
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;; or floating point CC.
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(define_insn_reservation "ir_vr54_condmove" 4
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(and (eq_attr "cpu" "r5400")
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(eq_attr "type" "move"))
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(eq_attr "type" "condmove"))
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"vr54_dp0|vr54_dp1")
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;; Move to/from FPU registers
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@ -64,7 +63,7 @@
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(define_insn_reservation "ir_vr54_arith" 1
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(and (eq_attr "cpu" "r5400")
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(eq_attr "type" "arith,darith,const,icmp,nop"))
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(eq_attr "type" "move,arith,darith,const,icmp,nop"))
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"vr54_dp0|vr54_dp1")
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(define_insn_reservation "ir_vr54_imul_si" 3
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@ -37,11 +37,10 @@
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"vr55_mem")
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;; This reservation is for conditional move based on integer
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;; or floating point CC. This could probably use some refinement
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;; as "move" type attr seems to be overloaded in rtl.
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(define_insn_reservation "ir_vr55_move" 2
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;; or floating point CC.
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(define_insn_reservation "ir_vr55_condmove" 2
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(and (eq_attr "cpu" "r5500")
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(eq_attr "type" "move"))
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(eq_attr "type" "condmove"))
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"vr55_dp0|vr55_dp1")
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;; Move to/from FPU registers
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@ -57,7 +56,7 @@
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(define_insn_reservation "ir_vr55_arith" 1
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(and (eq_attr "cpu" "r5500")
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(eq_attr "type" "arith,darith,const,icmp,nop"))
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(eq_attr "type" "move,arith,darith,const,icmp,nop"))
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"vr55_dp0|vr55_dp1")
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(define_insn_reservation "ir_vr55_imul_si" 3
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@ -100,6 +100,7 @@
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;; store store instruction(s)
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;; prefetch memory prefetch
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;; move data movement within same register set
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;; condmove conditional moves
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;; xfer transfer to/from coprocessor
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;; hilo transfer of hi/lo registers
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;; arith integer arithmetic instruction
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@ -122,7 +123,7 @@
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;; multi multiword sequence (or user asm statements)
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;; nop no operation
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(define_attr "type"
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"unknown,branch,jump,call,load,store,prefetch,move,xfer,hilo,const,arith,darith,imul,imadd,idiv,icmp,fadd,fmul,fmadd,fdiv,fabs,fneg,fcmp,fcvt,fsqrt,frsqrt,multi,nop"
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"unknown,branch,jump,call,load,store,prefetch,move,condmove,xfer,hilo,const,arith,darith,imul,imadd,idiv,icmp,fadd,fmul,fmadd,fdiv,fabs,fneg,fcmp,fcvt,fsqrt,frsqrt,multi,nop"
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(cond [(eq_attr "jal" "!unset")
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(const_string "call")]
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(const_string "unknown")))
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@ -8764,7 +8765,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
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"@
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mov%B4\\t%0,%z2,%1
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mov%b4\\t%0,%z3,%1"
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[(set_attr "type" "move")
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[(set_attr "type" "condmove")
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(set_attr "mode" "SI")])
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(define_insn ""
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@ -8779,7 +8780,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
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"@
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mov%B4\\t%0,%z2,%1
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mov%b4\\t%0,%z3,%1"
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[(set_attr "type" "move")
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[(set_attr "type" "condmove")
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(set_attr "mode" "SI")])
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(define_insn ""
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@ -8795,7 +8796,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
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"@
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mov%T3\\t%0,%z1,%4
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mov%t3\\t%0,%z2,%4"
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[(set_attr "type" "move")
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[(set_attr "type" "condmove")
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(set_attr "mode" "SI")])
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(define_insn ""
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@ -8810,7 +8811,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
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"@
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mov%B4\\t%0,%z2,%1
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mov%b4\\t%0,%z3,%1"
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[(set_attr "type" "move")
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[(set_attr "type" "condmove")
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(set_attr "mode" "DI")])
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(define_insn ""
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@ -8825,7 +8826,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
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"@
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mov%B4\\t%0,%z2,%1
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mov%b4\\t%0,%z3,%1"
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[(set_attr "type" "move")
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[(set_attr "type" "condmove")
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(set_attr "mode" "DI")])
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(define_insn ""
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@ -8841,7 +8842,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
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"@
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mov%T3\\t%0,%z1,%4
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mov%t3\\t%0,%z2,%4"
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[(set_attr "type" "move")
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[(set_attr "type" "condmove")
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(set_attr "mode" "DI")])
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(define_insn ""
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@ -8856,7 +8857,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
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"@
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mov%B4.s\\t%0,%2,%1
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mov%b4.s\\t%0,%3,%1"
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[(set_attr "type" "move")
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[(set_attr "type" "condmove")
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(set_attr "mode" "SF")])
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(define_insn ""
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@ -8871,7 +8872,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
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"@
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mov%B4.s\\t%0,%2,%1
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mov%b4.s\\t%0,%3,%1"
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[(set_attr "type" "move")
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[(set_attr "type" "condmove")
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(set_attr "mode" "SF")])
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(define_insn ""
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@ -8887,7 +8888,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
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"@
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mov%T3.s\\t%0,%1,%4
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mov%t3.s\\t%0,%2,%4"
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[(set_attr "type" "move")
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[(set_attr "type" "condmove")
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(set_attr "mode" "SF")])
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(define_insn ""
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@ -8902,7 +8903,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
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"@
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mov%B4.d\\t%0,%2,%1
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mov%b4.d\\t%0,%3,%1"
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[(set_attr "type" "move")
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[(set_attr "type" "condmove")
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(set_attr "mode" "DF")])
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(define_insn ""
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@ -8917,7 +8918,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
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"@
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mov%B4.d\\t%0,%2,%1
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mov%b4.d\\t%0,%3,%1"
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[(set_attr "type" "move")
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[(set_attr "type" "condmove")
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(set_attr "mode" "DF")])
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(define_insn ""
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@ -8933,7 +8934,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
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"@
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mov%T3.d\\t%0,%1,%4
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mov%t3.d\\t%0,%2,%4"
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[(set_attr "type" "move")
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[(set_attr "type" "condmove")
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(set_attr "mode" "DF")])
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;; These are the main define_expand's used to make conditional moves.
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@ -172,12 +172,11 @@
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;; This reservation is for conditional move based on integer
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;; or floating point CC. This could probably use some refinement
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;; as "move" type attr seems to be overloaded in rtl.
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(define_insn_reservation "ir_sr70_move"
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;; or floating point CC.
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(define_insn_reservation "ir_sr70_condmove"
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4
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(and (eq_attr "cpu" "sr71000")
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(eq_attr "type" "move"))
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(eq_attr "type" "condmove"))
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"ri_insns")
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;; Try to discriminate move-from-cp1 versus move-to-cp1 as latencies
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@ -206,7 +205,7 @@
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(define_insn_reservation "ir_sr70_arith"
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1
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(and (eq_attr "cpu" "sr71000")
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(eq_attr "type" "arith,darith,const"))
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(eq_attr "type" "move,arith,darith,const"))
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"ri_insns")
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;; emulate repeat (dispatch stall) by spending extra cycle(s) in
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