sparc: Fix atomic_test_and_set definition.
* config/sparc/sparc.c (TARGET_ATOMIC_TEST_AND_SET_TRUEVAL): New. * config/sparc/sync.md (atomic_test_and_set): Only handle QImode. (ldstub): Rename from ldstubqi. (ldstub<I24MODE>): Remove. From-SVN: r183584
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@ -1,3 +1,10 @@
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2012-01-27 Richard Henderson <rth@redhat.com>
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* config/sparc/sparc.c (TARGET_ATOMIC_TEST_AND_SET_TRUEVAL): New.
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* config/sparc/sync.md (atomic_test_and_set): Only handle QImode.
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(ldstub): Rename from ldstubqi.
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(ldstub<I24MODE>): Remove.
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2012-01-27 Richard Henderson <rth@redhat.com>
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2012-01-27 Richard Henderson <rth@redhat.com>
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* target.def (TARGET_ATOMIC_TEST_AND_SET_TRUEVAL): New.
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* target.def (TARGET_ATOMIC_TEST_AND_SET_TRUEVAL): New.
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@ -779,6 +779,10 @@ char sparc_hard_reg_printed[8];
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#undef TARGET_PRINT_OPERAND_ADDRESS
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#undef TARGET_PRINT_OPERAND_ADDRESS
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#define TARGET_PRINT_OPERAND_ADDRESS sparc_print_operand_address
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#define TARGET_PRINT_OPERAND_ADDRESS sparc_print_operand_address
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/* The value stored by LDSTUB. */
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#undef TARGET_ATOMIC_TEST_AND_SET_TRUEVAL
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#define TARGET_ATOMIC_TEST_AND_SET_TRUEVAL 0xff
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struct gcc_target targetm = TARGET_INITIALIZER;
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struct gcc_target targetm = TARGET_INITIALIZER;
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static void
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static void
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@ -242,25 +242,30 @@
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"swap\t%1, %0"
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"swap\t%1, %0"
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[(set_attr "type" "multi")])
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[(set_attr "type" "multi")])
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(define_expand "atomic_test_and_set<mode>"
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(define_expand "atomic_test_and_set"
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[(match_operand:I124MODE 0 "register_operand" "")
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[(match_operand:QI 0 "register_operand" "")
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(match_operand:I124MODE 1 "memory_operand" "")
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(match_operand:QI 1 "memory_operand" "")
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(match_operand:SI 2 "const_int_operand" "")]
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(match_operand:SI 2 "const_int_operand" "")]
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""
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""
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{
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{
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enum memmodel model = (enum memmodel) INTVAL (operands[2]);
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enum memmodel model = (enum memmodel) INTVAL (operands[2]);
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rtx ret;
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sparc_emit_membar_for_model (model, 3, 1);
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sparc_emit_membar_for_model (model, 3, 1);
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emit_insn (gen_ldstub (operands[0], operands[1]));
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if (<MODE>mode != QImode)
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operands[1] = adjust_address (operands[1], QImode, 0);
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emit_insn (gen_ldstub<mode> (operands[0], operands[1]));
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sparc_emit_membar_for_model (model, 3, 2);
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sparc_emit_membar_for_model (model, 3, 2);
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/* Convert the 0/0xff result we would otherwise have to a boolean.
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I.e. ignore all but bit 0. */
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ret = expand_simple_binop (QImode, AND, operands[0], const1_rtx,
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operands[0], true, OPTAB_LIB_WIDEN);
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if (ret != operands[0])
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emit_move_insn (operands[0], ret);
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DONE;
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DONE;
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})
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})
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(define_insn "ldstubqi"
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(define_insn "ldstub"
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[(set (match_operand:QI 0 "register_operand" "=r")
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[(set (match_operand:QI 0 "register_operand" "=r")
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(unspec_volatile:QI [(match_operand:QI 1 "memory_operand" "+m")]
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(unspec_volatile:QI [(match_operand:QI 1 "memory_operand" "+m")]
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UNSPECV_LDSTUB))
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UNSPECV_LDSTUB))
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@ -268,13 +273,3 @@
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""
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""
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"ldstub\t%1, %0"
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"ldstub\t%1, %0"
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[(set_attr "type" "multi")])
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[(set_attr "type" "multi")])
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(define_insn "ldstub<mode>"
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[(set (match_operand:I24MODE 0 "register_operand" "=r")
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(zero_extend:I24MODE
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(unspec_volatile:QI [(match_operand:QI 1 "memory_operand" "+m")]
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UNSPECV_LDSTUB)))
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(set (match_dup 1) (const_int -1))]
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""
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"ldstub\t%1, %0"
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[(set_attr "type" "multi")])
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