genrecog.c: Include regs.h in generated file.
2007-05-30 Eric Christopher <echristo@gmail.com> * genrecog.c: Include regs.h in generated file. * genemit.c: Ditto. Fix up formatting. * config/mn10300/constraints.md: New. * config/mn10300/mn10300.md: Include. * config/mn10300/mn10300.c(mn10300_secondary_reload_class): Fix up for removed macro. * config/mn10300/predicates.md (call_address_operand): Ditto. * config/mn10300/mn10300.h (REG_CLASS_FROM_LETTER): Delete. (CONST_OK_FOR_I): Ditto. (CONST_OK_FOR_J): Ditto. (CONST_OK_FOR_K): Ditto. (CONST_OK_FOR_L): Ditto. (CONST_OK_FOR_M): Ditto. (CONST_OK_FOR_N): Ditto. (CONST_DOUBLE_OK_FOR_LETTER_P): Ditto. (OK_FOR_Q): Ditto. (OK_FOR_R): Ditto. (OK_FOR_T): Ditto. (EXTRA_CONSTRAINT): Ditto. From-SVN: r125192
This commit is contained in:
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@ -1,3 +1,25 @@
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2007-05-30 Eric Christopher <echristo@gmail.com>
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* genrecog.c: Include regs.h in generated file.
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* genemit.c: Ditto. Fix up formatting.
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* config/mn10300/constraints.md: New.
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* config/mn10300/mn10300.md: Include.
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* config/mn10300/mn10300.c(mn10300_secondary_reload_class):
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Fix up for removed macro.
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* config/mn10300/predicates.md (call_address_operand): Ditto.
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* config/mn10300/mn10300.h (REG_CLASS_FROM_LETTER): Delete.
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(CONST_OK_FOR_I): Ditto.
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(CONST_OK_FOR_J): Ditto.
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(CONST_OK_FOR_K): Ditto.
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(CONST_OK_FOR_L): Ditto.
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(CONST_OK_FOR_M): Ditto.
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(CONST_OK_FOR_N): Ditto.
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(CONST_DOUBLE_OK_FOR_LETTER_P): Ditto.
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(OK_FOR_Q): Ditto.
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(OK_FOR_R): Ditto.
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(OK_FOR_T): Ditto.
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(EXTRA_CONSTRAINT): Ditto.
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2007-05-30 Uros Bizjak <ubizjak@gmail.com>
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2007-05-30 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.h (MASK_64BIT, MASK_MMX, MASK_3DNOW*, MASK_SSE*):
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* config/i386/i386.h (MASK_64BIT, MASK_MMX, MASK_3DNOW*, MASK_SSE*):
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@ -0,0 +1,112 @@
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;; Constraint definitions for the MN10300.
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;; Copyright (C) 2007 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 2, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING. If not, write to
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;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
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;; Boston, MA 02110-1301, USA.
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(define_register_constraint "d" "DATA_REGS"
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"A data register.")
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(define_register_constraint "a" "ADDRESS_REGS"
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"An address register.")
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(define_register_constraint "y" "SP_REGS"
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"An SP register (if available).")
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(define_register_constraint "x" "TARGET_AM33 ? EXTENDED_REGS : NO_REGS"
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"An extended register.")
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(define_register_constraint "f" "TARGET_AM33_2 ? FP_REGS : NO_REGS"
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"A floating point register.")
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(define_register_constraint "A" "TARGET_AM33_2 ? FP_ACC_REGS : NO_REGS"
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"A floating point accumulator register.")
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(define_memory_constraint "Q"
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"@internal"
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(and (match_code "mem")
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(match_test "!CONSTANT_ADDRESS_P (XEXP (op, 0))")))
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(define_memory_constraint "R"
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"@internal"
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(and (match_code "mem")
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(match_test "mode == QImode")
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(ior (match_test "CONSTANT_ADDRESS_P (XEXP (op, 0))")
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(and (match_test "GET_CODE (XEXP (op, 0)) == REG")
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(match_test "REG_OK_FOR_BIT_BASE_P (XEXP (op, 0))")
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(match_test "XEXP (op, 0) != stack_pointer_rtx"))
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(and (match_test "GET_CODE (XEXP (op, 0)) == PLUS")
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(match_test "GET_CODE (XEXP (XEXP (op, 0), 0)) == REG")
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(match_test "REG_OK_FOR_BIT_BASE_P (XEXP (XEXP (op, 0), 0))")
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(match_test "XEXP (XEXP (op, 0), 0) != stack_pointer_rtx")
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(match_test "GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT")
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(match_test "INT_8_BITS (INTVAL (XEXP (XEXP (op, 0), 1)))")))))
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(define_memory_constraint "T"
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"@internal"
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(and (match_code "mem")
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(match_test "mode == QImode")
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(and (match_test "GET_CODE (XEXP (op, 0)) == REG")
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(match_test "REG_OK_FOR_BIT_BASE_P (XEXP (op, 0))")
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(match_test "XEXP (op, 0) != stack_pointer_rtx"))))
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(define_constraint "S"
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"@internal"
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(if_then_else (match_test "flag_pic")
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(and (match_test "GET_CODE (op) == UNSPEC")
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(ior (match_test "XINT (op, 1) == UNSPEC_PLT")
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(match_test "XINT (op, 1) == UNSPEC_PIC")))
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(match_test "GET_CODE (op) == SYMBOL_REF")))
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;; Integer constraints
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(define_constraint "I"
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"An integer zero."
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(and (match_code "const_int")
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(match_test "ival == 0")))
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(define_constraint "J"
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"An integer one."
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(and (match_code "const_int")
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(match_test "ival == 1")))
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(define_constraint "K"
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"An integer two."
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(and (match_code "const_int")
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(match_test "ival == 2")))
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(define_constraint "L"
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"An integer four."
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(and (match_code "const_int")
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(match_test "ival == 4")))
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(define_constraint "M"
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"An integer three."
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(and (match_code "const_int")
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(match_test "ival == 3")))
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(define_constraint "N"
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"An integer of either 255 or 65535."
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(and (match_code "const_int")
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(ior (match_test "ival == 255")
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(match_test "ival == 65535"))))
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;; Floating-point constraints
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(define_constraint "G"
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"Floating-point zero."
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(and (match_code "const_double")
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(match_test "op == CONST0_RTX (mode)")))
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@ -1382,7 +1382,8 @@ mn10300_secondary_reload_class (enum reg_class class, enum machine_mode mode,
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}
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}
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if (TARGET_AM33_2 && class == FP_REGS
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if (TARGET_AM33_2 && class == FP_REGS
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&& GET_CODE (in) == MEM && ! OK_FOR_Q (in))
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&& GET_CODE (in) == MEM
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&& ! (GET_CODE (in) == MEM && !CONSTANT_ADDRESS_P (XEXP (in, 0))))
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{
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{
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if (TARGET_AM33)
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if (TARGET_AM33)
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return DATA_OR_EXTENDED_REGS;
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return DATA_OR_EXTENDED_REGS;
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#define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS
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#define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS
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#define BASE_REG_CLASS SP_OR_ADDRESS_REGS
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#define BASE_REG_CLASS SP_OR_ADDRESS_REGS
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/* Get reg_class from a letter such as appears in the machine description. */
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#define REG_CLASS_FROM_LETTER(C) \
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((C) == 'd' ? DATA_REGS : \
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(C) == 'a' ? ADDRESS_REGS : \
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(C) == 'y' ? SP_REGS : \
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! TARGET_AM33 ? NO_REGS : \
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(C) == 'x' ? EXTENDED_REGS : \
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! TARGET_AM33_2 ? NO_REGS : \
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(C) == 'f' ? FP_REGS : \
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(C) == 'A' ? FP_ACC_REGS : \
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NO_REGS)
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/* Macros to check register numbers against specific register classes. */
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/* Macros to check register numbers against specific register classes. */
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/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
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/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
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loaded the register. */
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loaded the register. */
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#define CLASS_CANNOT_CHANGE_SIZE FP_REGS
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#define CLASS_CANNOT_CHANGE_SIZE FP_REGS
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/* The letters I, J, K, L, M, N, O, P in a register constraint string
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/* Return 1 if VALUE is in the range specified. */
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can be used to stand for particular ranges of immediate operands.
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This macro defines what the ranges are.
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C is the letter, and VALUE is a constant value.
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Return 1 if VALUE is in the range specified by C. */
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#define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
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#define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
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#define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
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#define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
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#define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
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#define CONST_OK_FOR_J(VALUE) ((VALUE) == 1)
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#define CONST_OK_FOR_K(VALUE) ((VALUE) == 2)
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#define CONST_OK_FOR_L(VALUE) ((VALUE) == 4)
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#define CONST_OK_FOR_M(VALUE) ((VALUE) == 3)
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#define CONST_OK_FOR_N(VALUE) ((VALUE) == 255 || (VALUE) == 65535)
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#define CONST_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
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(C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
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(C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
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(C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
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(C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
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(C) == 'N' ? CONST_OK_FOR_N (VALUE) : 0)
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/* Similar, but for floating constants, and defining letters G and H.
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Here VALUE is the CONST_DOUBLE rtx itself.
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`G' is a floating-point zero. */
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#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
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&& (VALUE) == CONST0_RTX (GET_MODE (VALUE))) : 0)
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/* Stack layout; function entry, exit and calling. */
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/* Stack layout; function entry, exit and calling. */
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#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
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#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
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/* Extra constraints. */
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#define OK_FOR_Q(OP) \
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(GET_CODE (OP) == MEM && ! CONSTANT_ADDRESS_P (XEXP (OP, 0)))
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#define OK_FOR_R(OP) \
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(GET_CODE (OP) == MEM \
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&& GET_MODE (OP) == QImode \
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&& (CONSTANT_ADDRESS_P (XEXP (OP, 0)) \
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|| (GET_CODE (XEXP (OP, 0)) == REG \
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&& REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \
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&& XEXP (OP, 0) != stack_pointer_rtx) \
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|| (GET_CODE (XEXP (OP, 0)) == PLUS \
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&& GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
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&& REG_OK_FOR_BIT_BASE_P (XEXP (XEXP (OP, 0), 0)) \
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&& XEXP (XEXP (OP, 0), 0) != stack_pointer_rtx \
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&& GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT \
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&& INT_8_BITS (INTVAL (XEXP (XEXP (OP, 0), 1))))))
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#define OK_FOR_T(OP) \
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(GET_CODE (OP) == MEM \
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&& GET_MODE (OP) == QImode \
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&& (GET_CODE (XEXP (OP, 0)) == REG \
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&& REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \
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&& XEXP (OP, 0) != stack_pointer_rtx))
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#define EXTRA_CONSTRAINT(OP, C) \
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((C) == 'R' ? OK_FOR_R (OP) \
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: (C) == 'Q' ? OK_FOR_Q (OP) \
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: (C) == 'S' && flag_pic \
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? GET_CODE (OP) == UNSPEC && (XINT (OP, 1) == UNSPEC_PLT \
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|| XINT (OP, 1) == UNSPEC_PIC) \
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: (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF \
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: (C) == 'T' ? OK_FOR_T (OP) \
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: 0)
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/* Maximum number of registers that can appear in a valid memory address. */
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/* Maximum number of registers that can appear in a valid memory address. */
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#define MAX_REGS_PER_ADDRESS 2
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#define MAX_REGS_PER_ADDRESS 2
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@ -49,6 +49,7 @@
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])
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])
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(include "predicates.md")
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(include "predicates.md")
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(include "constraints.md")
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;; ----------------------------------------------------------------------
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;; ----------------------------------------------------------------------
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;; MOVE INSTRUCTIONS
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;; MOVE INSTRUCTIONS
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@ -44,7 +44,7 @@
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(match_code "symbol_ref,reg,unspec")
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(match_code "symbol_ref,reg,unspec")
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{
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{
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if (flag_pic)
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if (flag_pic)
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return (EXTRA_CONSTRAINT (op, 'S') || GET_CODE (op) == REG);
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return (satisfies_constraint_S (op) || GET_CODE (op) == REG);
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return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG);
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return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG);
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})
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})
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@ -854,9 +854,10 @@ from the machine description file `md'. */\n\n");
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printf ("#include \"resource.h\"\n");
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printf ("#include \"resource.h\"\n");
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printf ("#include \"reload.h\"\n");
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printf ("#include \"reload.h\"\n");
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printf ("#include \"toplev.h\"\n");
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printf ("#include \"toplev.h\"\n");
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printf ("#include \"regs.h\"\n");
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printf ("#include \"tm-constrs.h\"\n");
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printf ("#include \"tm-constrs.h\"\n");
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printf ("#include \"ggc.h\"\n\n");
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printf ("#include \"ggc.h\"\n");
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printf ("#include \"basic-block.h\"\n\n");
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printf ("#include \"basic-block.h\"\n");
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printf ("#include \"integrate.h\"\n\n");
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printf ("#include \"integrate.h\"\n\n");
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printf ("#define FAIL return (end_sequence (), _val)\n");
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printf ("#define FAIL return (end_sequence (), _val)\n");
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printf ("#define DONE return (_val = get_insns (), end_sequence (), _val)\n\n");
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printf ("#define DONE return (_val = get_insns (), end_sequence (), _val)\n\n");
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@ -2496,6 +2496,7 @@ write_header (void)
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#include \"resource.h\"\n\
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#include \"resource.h\"\n\
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#include \"toplev.h\"\n\
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#include \"toplev.h\"\n\
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#include \"reload.h\"\n\
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#include \"reload.h\"\n\
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#include \"regs.h\"\n\
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#include \"tm-constrs.h\"\n\
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#include \"tm-constrs.h\"\n\
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\n");
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\n");
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