genrecog.c: Include regs.h in generated file.
2007-05-30 Eric Christopher <echristo@gmail.com> * genrecog.c: Include regs.h in generated file. * genemit.c: Ditto. Fix up formatting. * config/mn10300/constraints.md: New. * config/mn10300/mn10300.md: Include. * config/mn10300/mn10300.c(mn10300_secondary_reload_class): Fix up for removed macro. * config/mn10300/predicates.md (call_address_operand): Ditto. * config/mn10300/mn10300.h (REG_CLASS_FROM_LETTER): Delete. (CONST_OK_FOR_I): Ditto. (CONST_OK_FOR_J): Ditto. (CONST_OK_FOR_K): Ditto. (CONST_OK_FOR_L): Ditto. (CONST_OK_FOR_M): Ditto. (CONST_OK_FOR_N): Ditto. (CONST_DOUBLE_OK_FOR_LETTER_P): Ditto. (OK_FOR_Q): Ditto. (OK_FOR_R): Ditto. (OK_FOR_T): Ditto. (EXTRA_CONSTRAINT): Ditto. From-SVN: r125192
This commit is contained in:
Eric Christopher
parent
9dd3cc811b
commit
5abc5de971
|
|
@ -1,3 +1,25 @@
|
|||
2007-05-30 Eric Christopher <echristo@gmail.com>
|
||||
|
||||
* genrecog.c: Include regs.h in generated file.
|
||||
* genemit.c: Ditto. Fix up formatting.
|
||||
* config/mn10300/constraints.md: New.
|
||||
* config/mn10300/mn10300.md: Include.
|
||||
* config/mn10300/mn10300.c(mn10300_secondary_reload_class):
|
||||
Fix up for removed macro.
|
||||
* config/mn10300/predicates.md (call_address_operand): Ditto.
|
||||
* config/mn10300/mn10300.h (REG_CLASS_FROM_LETTER): Delete.
|
||||
(CONST_OK_FOR_I): Ditto.
|
||||
(CONST_OK_FOR_J): Ditto.
|
||||
(CONST_OK_FOR_K): Ditto.
|
||||
(CONST_OK_FOR_L): Ditto.
|
||||
(CONST_OK_FOR_M): Ditto.
|
||||
(CONST_OK_FOR_N): Ditto.
|
||||
(CONST_DOUBLE_OK_FOR_LETTER_P): Ditto.
|
||||
(OK_FOR_Q): Ditto.
|
||||
(OK_FOR_R): Ditto.
|
||||
(OK_FOR_T): Ditto.
|
||||
(EXTRA_CONSTRAINT): Ditto.
|
||||
|
||||
2007-05-30 Uros Bizjak <ubizjak@gmail.com>
|
||||
|
||||
* config/i386/i386.h (MASK_64BIT, MASK_MMX, MASK_3DNOW*, MASK_SSE*):
|
||||
|
|
|
|||
|
|
@ -0,0 +1,112 @@
|
|||
;; Constraint definitions for the MN10300.
|
||||
;; Copyright (C) 2007 Free Software Foundation, Inc.
|
||||
;;
|
||||
;; This file is part of GCC.
|
||||
;;
|
||||
;; GCC is free software; you can redistribute it and/or modify
|
||||
;; it under the terms of the GNU General Public License as published by
|
||||
;; the Free Software Foundation; either version 2, or (at your option)
|
||||
;; any later version.
|
||||
;;
|
||||
;; GCC is distributed in the hope that it will be useful,
|
||||
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
;; GNU General Public License for more details.
|
||||
;;
|
||||
;; You should have received a copy of the GNU General Public License
|
||||
;; along with GCC; see the file COPYING. If not, write to
|
||||
;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
|
||||
;; Boston, MA 02110-1301, USA.
|
||||
|
||||
(define_register_constraint "d" "DATA_REGS"
|
||||
"A data register.")
|
||||
|
||||
(define_register_constraint "a" "ADDRESS_REGS"
|
||||
"An address register.")
|
||||
|
||||
(define_register_constraint "y" "SP_REGS"
|
||||
"An SP register (if available).")
|
||||
|
||||
(define_register_constraint "x" "TARGET_AM33 ? EXTENDED_REGS : NO_REGS"
|
||||
"An extended register.")
|
||||
|
||||
(define_register_constraint "f" "TARGET_AM33_2 ? FP_REGS : NO_REGS"
|
||||
"A floating point register.")
|
||||
|
||||
(define_register_constraint "A" "TARGET_AM33_2 ? FP_ACC_REGS : NO_REGS"
|
||||
"A floating point accumulator register.")
|
||||
|
||||
(define_memory_constraint "Q"
|
||||
"@internal"
|
||||
(and (match_code "mem")
|
||||
(match_test "!CONSTANT_ADDRESS_P (XEXP (op, 0))")))
|
||||
|
||||
(define_memory_constraint "R"
|
||||
"@internal"
|
||||
(and (match_code "mem")
|
||||
(match_test "mode == QImode")
|
||||
(ior (match_test "CONSTANT_ADDRESS_P (XEXP (op, 0))")
|
||||
(and (match_test "GET_CODE (XEXP (op, 0)) == REG")
|
||||
(match_test "REG_OK_FOR_BIT_BASE_P (XEXP (op, 0))")
|
||||
(match_test "XEXP (op, 0) != stack_pointer_rtx"))
|
||||
(and (match_test "GET_CODE (XEXP (op, 0)) == PLUS")
|
||||
(match_test "GET_CODE (XEXP (XEXP (op, 0), 0)) == REG")
|
||||
(match_test "REG_OK_FOR_BIT_BASE_P (XEXP (XEXP (op, 0), 0))")
|
||||
(match_test "XEXP (XEXP (op, 0), 0) != stack_pointer_rtx")
|
||||
(match_test "GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT")
|
||||
(match_test "INT_8_BITS (INTVAL (XEXP (XEXP (op, 0), 1)))")))))
|
||||
|
||||
(define_memory_constraint "T"
|
||||
"@internal"
|
||||
(and (match_code "mem")
|
||||
(match_test "mode == QImode")
|
||||
(and (match_test "GET_CODE (XEXP (op, 0)) == REG")
|
||||
(match_test "REG_OK_FOR_BIT_BASE_P (XEXP (op, 0))")
|
||||
(match_test "XEXP (op, 0) != stack_pointer_rtx"))))
|
||||
|
||||
(define_constraint "S"
|
||||
"@internal"
|
||||
(if_then_else (match_test "flag_pic")
|
||||
(and (match_test "GET_CODE (op) == UNSPEC")
|
||||
(ior (match_test "XINT (op, 1) == UNSPEC_PLT")
|
||||
(match_test "XINT (op, 1) == UNSPEC_PIC")))
|
||||
(match_test "GET_CODE (op) == SYMBOL_REF")))
|
||||
|
||||
;; Integer constraints
|
||||
|
||||
(define_constraint "I"
|
||||
"An integer zero."
|
||||
(and (match_code "const_int")
|
||||
(match_test "ival == 0")))
|
||||
|
||||
(define_constraint "J"
|
||||
"An integer one."
|
||||
(and (match_code "const_int")
|
||||
(match_test "ival == 1")))
|
||||
|
||||
(define_constraint "K"
|
||||
"An integer two."
|
||||
(and (match_code "const_int")
|
||||
(match_test "ival == 2")))
|
||||
|
||||
(define_constraint "L"
|
||||
"An integer four."
|
||||
(and (match_code "const_int")
|
||||
(match_test "ival == 4")))
|
||||
|
||||
(define_constraint "M"
|
||||
"An integer three."
|
||||
(and (match_code "const_int")
|
||||
(match_test "ival == 3")))
|
||||
|
||||
(define_constraint "N"
|
||||
"An integer of either 255 or 65535."
|
||||
(and (match_code "const_int")
|
||||
(ior (match_test "ival == 255")
|
||||
(match_test "ival == 65535"))))
|
||||
|
||||
;; Floating-point constraints
|
||||
(define_constraint "G"
|
||||
"Floating-point zero."
|
||||
(and (match_code "const_double")
|
||||
(match_test "op == CONST0_RTX (mode)")))
|
||||
|
|
@ -1382,7 +1382,8 @@ mn10300_secondary_reload_class (enum reg_class class, enum machine_mode mode,
|
|||
}
|
||||
|
||||
if (TARGET_AM33_2 && class == FP_REGS
|
||||
&& GET_CODE (in) == MEM && ! OK_FOR_Q (in))
|
||||
&& GET_CODE (in) == MEM
|
||||
&& ! (GET_CODE (in) == MEM && !CONSTANT_ADDRESS_P (XEXP (in, 0))))
|
||||
{
|
||||
if (TARGET_AM33)
|
||||
return DATA_OR_EXTENDED_REGS;
|
||||
|
|
|
|||
|
|
@ -313,19 +313,6 @@ enum reg_class {
|
|||
#define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS
|
||||
#define BASE_REG_CLASS SP_OR_ADDRESS_REGS
|
||||
|
||||
/* Get reg_class from a letter such as appears in the machine description. */
|
||||
|
||||
#define REG_CLASS_FROM_LETTER(C) \
|
||||
((C) == 'd' ? DATA_REGS : \
|
||||
(C) == 'a' ? ADDRESS_REGS : \
|
||||
(C) == 'y' ? SP_REGS : \
|
||||
! TARGET_AM33 ? NO_REGS : \
|
||||
(C) == 'x' ? EXTENDED_REGS : \
|
||||
! TARGET_AM33_2 ? NO_REGS : \
|
||||
(C) == 'f' ? FP_REGS : \
|
||||
(C) == 'A' ? FP_ACC_REGS : \
|
||||
NO_REGS)
|
||||
|
||||
/* Macros to check register numbers against specific register classes. */
|
||||
|
||||
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
|
||||
|
|
@ -440,40 +427,11 @@ enum reg_class {
|
|||
loaded the register. */
|
||||
#define CLASS_CANNOT_CHANGE_SIZE FP_REGS
|
||||
|
||||
/* The letters I, J, K, L, M, N, O, P in a register constraint string
|
||||
can be used to stand for particular ranges of immediate operands.
|
||||
This macro defines what the ranges are.
|
||||
C is the letter, and VALUE is a constant value.
|
||||
Return 1 if VALUE is in the range specified by C. */
|
||||
/* Return 1 if VALUE is in the range specified. */
|
||||
|
||||
#define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
|
||||
#define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
|
||||
|
||||
#define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
|
||||
#define CONST_OK_FOR_J(VALUE) ((VALUE) == 1)
|
||||
#define CONST_OK_FOR_K(VALUE) ((VALUE) == 2)
|
||||
#define CONST_OK_FOR_L(VALUE) ((VALUE) == 4)
|
||||
#define CONST_OK_FOR_M(VALUE) ((VALUE) == 3)
|
||||
#define CONST_OK_FOR_N(VALUE) ((VALUE) == 255 || (VALUE) == 65535)
|
||||
|
||||
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
|
||||
((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
|
||||
(C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
|
||||
(C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
|
||||
(C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
|
||||
(C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
|
||||
(C) == 'N' ? CONST_OK_FOR_N (VALUE) : 0)
|
||||
|
||||
|
||||
/* Similar, but for floating constants, and defining letters G and H.
|
||||
Here VALUE is the CONST_DOUBLE rtx itself.
|
||||
|
||||
`G' is a floating-point zero. */
|
||||
|
||||
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
|
||||
((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
|
||||
&& (VALUE) == CONST0_RTX (GET_MODE (VALUE))) : 0)
|
||||
|
||||
|
||||
/* Stack layout; function entry, exit and calling. */
|
||||
|
||||
|
|
@ -676,42 +634,6 @@ struct cum_arg {int nbytes; };
|
|||
|
||||
#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
|
||||
|
||||
/* Extra constraints. */
|
||||
|
||||
#define OK_FOR_Q(OP) \
|
||||
(GET_CODE (OP) == MEM && ! CONSTANT_ADDRESS_P (XEXP (OP, 0)))
|
||||
|
||||
#define OK_FOR_R(OP) \
|
||||
(GET_CODE (OP) == MEM \
|
||||
&& GET_MODE (OP) == QImode \
|
||||
&& (CONSTANT_ADDRESS_P (XEXP (OP, 0)) \
|
||||
|| (GET_CODE (XEXP (OP, 0)) == REG \
|
||||
&& REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \
|
||||
&& XEXP (OP, 0) != stack_pointer_rtx) \
|
||||
|| (GET_CODE (XEXP (OP, 0)) == PLUS \
|
||||
&& GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
|
||||
&& REG_OK_FOR_BIT_BASE_P (XEXP (XEXP (OP, 0), 0)) \
|
||||
&& XEXP (XEXP (OP, 0), 0) != stack_pointer_rtx \
|
||||
&& GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT \
|
||||
&& INT_8_BITS (INTVAL (XEXP (XEXP (OP, 0), 1))))))
|
||||
|
||||
#define OK_FOR_T(OP) \
|
||||
(GET_CODE (OP) == MEM \
|
||||
&& GET_MODE (OP) == QImode \
|
||||
&& (GET_CODE (XEXP (OP, 0)) == REG \
|
||||
&& REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \
|
||||
&& XEXP (OP, 0) != stack_pointer_rtx))
|
||||
|
||||
#define EXTRA_CONSTRAINT(OP, C) \
|
||||
((C) == 'R' ? OK_FOR_R (OP) \
|
||||
: (C) == 'Q' ? OK_FOR_Q (OP) \
|
||||
: (C) == 'S' && flag_pic \
|
||||
? GET_CODE (OP) == UNSPEC && (XINT (OP, 1) == UNSPEC_PLT \
|
||||
|| XINT (OP, 1) == UNSPEC_PIC) \
|
||||
: (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF \
|
||||
: (C) == 'T' ? OK_FOR_T (OP) \
|
||||
: 0)
|
||||
|
||||
/* Maximum number of registers that can appear in a valid memory address. */
|
||||
|
||||
#define MAX_REGS_PER_ADDRESS 2
|
||||
|
|
|
|||
|
|
@ -49,6 +49,7 @@
|
|||
])
|
||||
|
||||
(include "predicates.md")
|
||||
(include "constraints.md")
|
||||
|
||||
;; ----------------------------------------------------------------------
|
||||
;; MOVE INSTRUCTIONS
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@
|
|||
(match_code "symbol_ref,reg,unspec")
|
||||
{
|
||||
if (flag_pic)
|
||||
return (EXTRA_CONSTRAINT (op, 'S') || GET_CODE (op) == REG);
|
||||
return (satisfies_constraint_S (op) || GET_CODE (op) == REG);
|
||||
|
||||
return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG);
|
||||
})
|
||||
|
|
|
|||
|
|
@ -854,9 +854,10 @@ from the machine description file `md'. */\n\n");
|
|||
printf ("#include \"resource.h\"\n");
|
||||
printf ("#include \"reload.h\"\n");
|
||||
printf ("#include \"toplev.h\"\n");
|
||||
printf ("#include \"regs.h\"\n");
|
||||
printf ("#include \"tm-constrs.h\"\n");
|
||||
printf ("#include \"ggc.h\"\n\n");
|
||||
printf ("#include \"basic-block.h\"\n\n");
|
||||
printf ("#include \"ggc.h\"\n");
|
||||
printf ("#include \"basic-block.h\"\n");
|
||||
printf ("#include \"integrate.h\"\n\n");
|
||||
printf ("#define FAIL return (end_sequence (), _val)\n");
|
||||
printf ("#define DONE return (_val = get_insns (), end_sequence (), _val)\n\n");
|
||||
|
|
|
|||
|
|
@ -2496,6 +2496,7 @@ write_header (void)
|
|||
#include \"resource.h\"\n\
|
||||
#include \"toplev.h\"\n\
|
||||
#include \"reload.h\"\n\
|
||||
#include \"regs.h\"\n\
|
||||
#include \"tm-constrs.h\"\n\
|
||||
\n");
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue