h8300.md (udivmodqi4): Split the pattern into an expander and an anonymous pattern.

* config/h8300/h8300.md (udivmodqi4): Split the pattern into
	an expander and an anonymous pattern.  Zero out the upper half
	of the dividend in the expander.
	(udivmodqi4): Likewise.

From-SVN: r56923
This commit is contained in:
Kazu Hirata 2002-09-07 20:21:43 +00:00 committed by Kazu Hirata
parent 902c7fdf7c
commit 5c102b484a
2 changed files with 45 additions and 2 deletions

View File

@ -1,3 +1,10 @@
2002-09-07 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md (udivmodqi4): Split the pattern into
an expander and an anonymous pattern. Zero out the upper half
of the dividend in the expander.
(udivmodqi4): Likewise.
2002-09-07 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.c: Fix formatting.

View File

@ -911,7 +911,25 @@
;; DIVIDE/MOD INSTRUCTIONS
;; ----------------------------------------------------------------------
(define_insn "udivmodqi4"
(define_expand "udivmodqi4"
[(set (match_operand:HI 1 "register_operand" "")
(and:HI (match_dup 1)
(const_int 255)))
(parallel [(set (match_operand:QI 0 "register_operand" "")
(truncate:QI
(udiv:HI
(match_dup 1)
(zero_extend:HI
(match_operand:QI 2 "register_operand" "")))))
(set (match_operand:QI 3 "register_operand" "")
(truncate:QI
(umod:HI
(match_dup 1)
(zero_extend:HI (match_dup 2)))))])]
"TARGET_H8300H || TARGET_H8300S"
"")
(define_insn ""
[(set (match_operand:QI 0 "register_operand" "=r")
(truncate:QI
(udiv:HI
@ -955,7 +973,25 @@
[(set_attr "length" "6")
(set_attr "cc" "clobber")])
(define_insn "udivmodhi4"
(define_expand "udivmodhi4"
[(set (match_operand:SI 1 "register_operand" "")
(and:SI (match_dup 1)
(const_int 65535)))
(parallel [(set (match_operand:HI 0 "register_operand" "")
(truncate:HI
(udiv:SI
(match_dup 1)
(zero_extend:SI
(match_operand:HI 2 "register_operand" "")))))
(set (match_operand:HI 3 "register_operand" "")
(truncate:HI
(umod:SI
(match_dup 1)
(zero_extend:SI (match_dup 2)))))])]
"TARGET_H8300H || TARGET_H8300S"
"")
(define_insn ""
[(set (match_operand:HI 0 "register_operand" "=r")
(truncate:HI
(udiv:SI