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From-SVN: r422
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Richard Kenner
parent
82bb2b597d
commit
5c23c40172
@ -1018,6 +1018,17 @@ print_operand (file, x, code)
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RS6000_OUTPUT_BASENAME (file, XSTR (x, 0));
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return;
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case 'A':
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/* If X is a constant integer whose low-order 5 bits are zero,
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write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
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in the RS/6000 assembler where "sri" with a zero shift count
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write a trash instruction. */
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if (GET_CODE (x) != CONST_INT && (INTVAL (x) & 31) == 0)
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fprintf (file, "l");
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else
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fprintf (file, "r");
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return;
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case 0:
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if (GET_CODE (x) == REG)
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fprintf (file, "%s", reg_names[REGNO (x)]);
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@ -22,7 +22,7 @@
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;; Define an insn type attribute. This is used in function unit delay
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;; computations.
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(define_attr "type" "load,integer,fp,compare,delayed_compare,fpcompare"
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(define_attr "type" "load,integer,fp,compare,delayed_compare,fpcompare,mtlr"
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(const_string "integer"))
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;; Memory delivers its result in two cycles.
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@ -40,6 +40,9 @@
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;; Floating-point comparisons take eight cycles.
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(define_function_unit "compare" 1 0 (eq_attr "type" "fpcompare") 8 0)
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;; Branches on LR cannot be done until five cycles after LR is set.
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(define_function_unit "branch" 1 0 (eq_attr "type" "mtlr") 5 0)
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;; Start with fixed-point load and store insns. Here we put only the more
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;; complex forms. Basic data transfer is done later.
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@ -328,7 +331,7 @@
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(define_insn ""
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[(set (match_operand:SI 0 "gen_reg_operand" "=r")
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(if_then_else:SI (gt (match_operand:SI 1 "gen_reg_operand" "r")
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(match_operand:SI 2 "reg_or_short_operand" "r"))
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(match_operand:SI 2 "reg_or_short_operand" "rI"))
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(const_int 0)
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(minus:SI (match_dup 2) (match_dup 1))))]
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""
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@ -338,7 +341,7 @@
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[(set (match_operand:CC 0 "cc_reg_operand" "=x")
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(compare:CC
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(if_then_else:SI (gt (match_operand:SI 1 "gen_reg_operand" "r")
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(match_operand:SI 2 "reg_or_short_operand" "r"))
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(match_operand:SI 2 "reg_or_short_operand" "rI"))
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(const_int 0)
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(minus:SI (match_dup 2) (match_dup 1)))
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(const_int 0)))
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@ -351,7 +354,7 @@
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[(set (match_operand:CC 3 "cc_reg_operand" "=x")
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(compare:CC
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(if_then_else:SI (gt (match_operand:SI 1 "gen_reg_operand" "r")
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(match_operand:SI 2 "reg_or_short_operand" "r"))
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(match_operand:SI 2 "reg_or_short_operand" "rI"))
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(const_int 0)
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(minus:SI (match_dup 2) (match_dup 1)))
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(const_int 0)))
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@ -1277,6 +1280,8 @@
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"rlinm. %0,%h1,%h2,%m3,%M3"
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[(set_attr "type" "delayed_compare")])
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;; The RS/6000 assembler mis-handles "sri x,x,0", so write that case as
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;; "sli x,x,0".
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(define_insn "lshrsi3"
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[(set (match_operand:SI 0 "gen_reg_operand" "=r,r")
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(lshiftrt:SI (match_operand:SI 1 "gen_reg_operand" "r,r")
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@ -1285,7 +1290,7 @@
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""
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"@
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sre %0,%1,%2
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sri %0,%1,%h2")
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s%A2i %0,%1,%h2")
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(define_insn ""
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[(set (match_operand:CC 0 "cc_reg_operand" "=x,x")
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@ -1297,7 +1302,7 @@
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""
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"@
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sre. %3,%1,%2
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sri. %3,%1,%h2"
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s%A2i. %3,%1,%h2"
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[(set_attr "type" "delayed_compare")])
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(define_insn ""
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@ -1311,7 +1316,7 @@
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""
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"@
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sre. %0,%1,%2
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sri. %0,%1,%h2"
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s%A2i. %0,%1,%h2"
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[(set_attr "type" "delayed_compare")])
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(define_insn ""
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@ -1936,19 +1941,19 @@
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sli %0,%L1,%h2\;cal %L0,0(0)
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sl%I2q %L0,%L1,%h2\;sll%I2q %0,%1,%h2
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sl%I2q %L0,%L1,%h2\;sll%I2q %0,%1,%h2
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sl%I2q %L0,%L1,%h2\;sll%I2q %0,%1,%h2 ")
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sl%I2q %L0,%L1,%h2\;sll%I2q %0,%1,%h2")
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(define_insn "lshrdi3"
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[(set (match_operand:DI 0 "gen_reg_operand" "=r,r,r,&r")
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[(set (match_operand:DI 0 "gen_reg_operand" "=&r,r,r,&r")
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(lshiftrt:DI (match_operand:DI 1 "gen_reg_operand" "r,r,0,r")
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(match_operand:SI 2 "reg_or_cint_operand" "M,i,r,r")))
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(clobber (match_scratch:SI 3 "=X,q,q,q"))]
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""
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"@
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cal %0,0(0)\;sri %L0,%1,%h2
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sr%I2q %L0,%L1,%2\;srl%I2q %0,%1,%2
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sr%I2q %L0,%L1,%2\;srl%I2q %0,%1,%2
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sr%I2q %L0,%L1,%2\;srl%I2q %0,%1,%2 ")
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cal %0,0(0)\;s%A2i %L0,%1,%h2
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s%A2%I2q %L0,%L1,%2\;srl%I2q %0,%1,%2
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s%A2%I2q %L0,%L1,%2\;srl%I2q %0,%1,%2
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s%A2%I2q %L0,%L1,%2\;srl%I2q %0,%1,%2")
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;; Shift by a variable amount is too complex to be worth open-coding. We
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;; just handle shifts by constants.
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@ -2007,8 +2012,8 @@
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}")
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(define_insn ""
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[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m,r,r,r,*h")
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(match_operand:SI 1 "input_operand" "r,m,r,I,J,*h,r"))]
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[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m,r,r,r,*c*q,*l")
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(match_operand:SI 1 "input_operand" "r,m,r,I,J,*h,r,r"))]
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"gen_reg_operand (operands[0], SImode)
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|| gen_reg_operand (operands[1], SImode)"
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"@
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@ -2018,8 +2023,9 @@
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cal %0,%1(0)
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cau %0,0,%u1
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mf%1 %0
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mt%0 %1
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mt%0 %1"
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[(set_attr "type" "*,load,*,*,*,*,*")])
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[(set_attr "type" "*,load,*,*,*,*,*,mtlr")])
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(define_insn ""
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[(set (match_operand:CC 2 "cc_reg_operand" "=x")
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@ -1775,14 +1775,14 @@ copy_rtx_and_substitute (orig, map)
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rounded = CEIL_ROUND (size, BIGGEST_ALIGNMENT / BITS_PER_UNIT);
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loc = plus_constant (loc, rounded);
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#endif
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map->reg_map[regno] = force_operand (loc, 0);
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map->const_equiv_map[regno] = loc;
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map->const_age_map[regno] = CONST_AGE_PARM;
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map->reg_map[regno] = temp = force_operand (loc, 0);
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map->const_equiv_map[REGNO (temp)] = loc;
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map->const_age_map[REGNO (temp)] = CONST_AGE_PARM;
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seq = gen_sequence ();
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end_sequence ();
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emit_insn_after (seq, map->insns_at_start);
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return map->reg_map[regno];
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return temp;
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}
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else if (regno == VIRTUAL_INCOMING_ARGS_REGNUM)
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{
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@ -1794,14 +1794,14 @@ copy_rtx_and_substitute (orig, map)
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start_sequence ();
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loc = assign_stack_temp (BLKmode, size, 1);
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loc = XEXP (loc, 0);
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map->reg_map[regno] = force_operand (loc, 0);
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map->const_equiv_map[regno] = loc;
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map->const_age_map[regno] = CONST_AGE_PARM;
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map->reg_map[regno] = temp = force_operand (loc, 0);
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map->const_equiv_map[REGNO (temp)] = loc;
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map->const_age_map[REGNO (temp)] = CONST_AGE_PARM;
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seq = gen_sequence ();
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end_sequence ();
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emit_insn_after (seq, map->insns_at_start);
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return map->reg_map[regno];
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return temp;
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}
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else if (REG_FUNCTION_VALUE_P (orig))
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{
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@ -1367,6 +1367,20 @@ reload (first, global, dumpfile)
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}
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}
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/* See if anything that happened changes which eliminations are valid.
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For example, on the Sparc, whether or not the frame pointer can
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be eliminated can depend on what registers have been used. We need
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not check some conditions again (such as flag_omit_frame_pointer)
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since they can't have changed. */
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for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
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if ((ep->from == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED)
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#ifdef ELIMINABLE_REGS
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|| ! CAN_ELIMINATE (ep->from, ep->to)
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#endif
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)
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ep->can_eliminate = 0;
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/* Look for the case where we have discovered that we can't replace
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register A with register B and that means that we will now be
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trying to replace register A with register C. This means we can
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