mips.h (ISA_HAS_BRANCHLIKELY): Remove TARGET_MIPS5500.
* config/mips/mips.h (ISA_HAS_BRANCHLIKELY): Remove TARGET_MIPS5500. * config/mips/mips.c (override_options): Disable branch likely instructions if TUNE_MIPS5500. From-SVN: r81624
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@ -1,3 +1,9 @@
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2004-05-07 Richard Sandiford <rsandifo@redhat.com>
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* config/mips/mips.h (ISA_HAS_BRANCHLIKELY): Remove TARGET_MIPS5500.
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* config/mips/mips.c (override_options): Disable branch likely
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instructions if TUNE_MIPS5500.
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2004-05-07 Richard Sandiford <rsandifo@redhat.com>
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* config/mips/mips.c (override_options): Allow the hi and lo registers
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@ -4744,7 +4744,7 @@ override_options (void)
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-mbranch-likely. */
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if (ISA_HAS_BRANCHLIKELY
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&& !(ISA_MIPS32 || ISA_MIPS32R2 || ISA_MIPS64)
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&& !(TUNE_SB1))
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&& !(TUNE_MIPS5500 || TUNE_SB1))
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target_flags |= MASK_BRANCHLIKELY;
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else
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target_flags &= ~MASK_BRANCHLIKELY;
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@ -858,8 +858,7 @@ extern const struct mips_cpu_info *mips_tune_info;
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/* ISA has branch likely instructions (eg. mips2). */
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/* Disable branchlikely for tx39 until compare rewrite. They haven't
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been generated up to this point. */
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#define ISA_HAS_BRANCHLIKELY (!ISA_MIPS1 \
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&& !TARGET_MIPS5500)
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#define ISA_HAS_BRANCHLIKELY (!ISA_MIPS1)
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/* ISA has the conditional move instructions introduced in mips4. */
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#define ISA_HAS_CONDMOVE ((ISA_MIPS4 \
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