aarch64: Relax some builtins to AUTO_FP
This patch relaxes the flags for some builtins to AUTO_FP. These builtins do permutes and similar, so they shouldn't get the FP flags when operating on floating-point modes as they don't care about FPCR/FPSR and exceptions. gcc/ChangeLog: * config/aarch64/aarch64-simd-builtins.def (combine, zip1, zip2, uzp1, uzp2, trn1, trn2, simd_bsl): Use AUTO_FP flags.
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@ -43,8 +43,8 @@
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help describe the attributes (for example, pure) for the intrinsic
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function. */
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BUILTIN_VDC (COMBINE, combine, 0, ALL)
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VAR1 (COMBINEP, combine, 0, ALL, di)
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BUILTIN_VDC (COMBINE, combine, 0, AUTO_FP)
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VAR1 (COMBINEP, combine, 0, NONE, di)
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BUILTIN_VB (BINOP, pmul, 0, NONE)
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BUILTIN_VHSDF_HSDF (BINOP, fmulx, 0, FP)
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BUILTIN_VHSDF_DF (UNOP, sqrt, 2, FP)
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@ -556,12 +556,12 @@
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/* Implemented by
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aarch64_<PERMUTE:perm_insn><mode>. */
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BUILTIN_VALL (BINOP, zip1, 0, ALL)
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BUILTIN_VALL (BINOP, zip2, 0, ALL)
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BUILTIN_VALL (BINOP, uzp1, 0, ALL)
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BUILTIN_VALL (BINOP, uzp2, 0, ALL)
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BUILTIN_VALL (BINOP, trn1, 0, ALL)
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BUILTIN_VALL (BINOP, trn2, 0, ALL)
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BUILTIN_VALL (BINOP, zip1, 0, AUTO_FP)
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BUILTIN_VALL (BINOP, zip2, 0, AUTO_FP)
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BUILTIN_VALL (BINOP, uzp1, 0, AUTO_FP)
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BUILTIN_VALL (BINOP, uzp2, 0, AUTO_FP)
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BUILTIN_VALL (BINOP, trn1, 0, AUTO_FP)
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BUILTIN_VALL (BINOP, trn2, 0, AUTO_FP)
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BUILTIN_GPF_F16 (UNOP, frecpe, 0, FP)
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BUILTIN_GPF_F16 (UNOP, frecpx, 0, FP)
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@ -619,7 +619,7 @@
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BUILTIN_VDQQH (BSL_P, simd_bsl, 0, NONE)
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VAR2 (BSL_P, simd_bsl,0, NONE, di, v2di)
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BUILTIN_VSDQ_I_DI (BSL_U, simd_bsl, 0, NONE)
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BUILTIN_VALLDIF (BSL_S, simd_bsl, 0, ALL)
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BUILTIN_VALLDIF (BSL_S, simd_bsl, 0, AUTO_FP)
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/* Implemented by aarch64_crypto_aes<op><mode>. */
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VAR1 (BINOPU, crypto_aese, 0, NONE, v16qi)
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