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driver-i386.c (host_detect_local_cpu): Detect cascadelake. 

gcc/ChangeLog
2018-12-18  Wei Xiao  <wei3.xiao@intel.com>

	* config/i386/driver-i386.c (host_detect_local_cpu): Detect cascadelake.
	* config/i386/i386.c (fold_builtin_cpu): Handle cascadelake.
	* doc/extend.texi: Add cascadelake.

gcc/testsuite/ChangeLog
2018-12-18  Wei Xiao  <wei3.xiao@intel.com>

	* g++.target/i386/mv16.C: Handle new march.
	* gcc.target/i386/builtin_target.c: Ditto.

libgcc/ChangeLog
2018-12-18  Wei Xiao  <wei3.xiao@intel.com>

	* config/i386/cpuinfo.c (get_intel_cpu): Handle cascadelake.
	* config/i386/cpuinfo.h: Add INTEL_COREI7_CASCADELAKE.

From-SVN: r267226
This commit is contained in:
Wei Xiao 2018-12-18 03:41:44 +00:00 committed by Xuepeng Guo
parent f9fd26fe57
commit 5d54c79858
10 changed files with 57 additions and 10 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2018-12-18 Wei Xiao <wei3.xiao@intel.com>
* config/i386/driver-i386.c (host_detect_local_cpu): Detect cascadelake.
* config/i386/i386.c (fold_builtin_cpu): Handle cascadelake.
* doc/extend.texi: Add cascadelake.
2018-12-17 Peter Bergner <bergner@linux.ibm.com>
PR target/87870

8
gcc/config/i386/driver-i386.c
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@ -832,8 +832,12 @@ const char *host_detect_local_cpu (int argc, const char **argv)
cpu = "skylake";
break;
case 0x55:
/* Skylake with AVX-512. */
cpu = "skylake-avx512";
if (has_avx512vnni)
/* Cascade Lake. */
cpu = "cascadelake";
else
/* Skylake with AVX-512. */
cpu = "skylake-avx512";
break;
case 0x57:
/* Knights Landing. */

4
gcc/config/i386/i386.c
View File

@ -32393,7 +32393,8 @@ fold_builtin_cpu (tree fndecl, tree *args)
M_INTEL_COREI7_CANNONLAKE,
M_INTEL_COREI7_ICELAKE_CLIENT,
M_INTEL_COREI7_ICELAKE_SERVER,
M_AMDFAM17H_ZNVER2
M_AMDFAM17H_ZNVER2,
M_INTEL_COREI7_CASCADELAKE
};
static struct _arch_names_table
@ -32420,6 +32421,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
{"cannonlake", M_INTEL_COREI7_CANNONLAKE},
{"icelake-client", M_INTEL_COREI7_ICELAKE_CLIENT},
{"icelake-server", M_INTEL_COREI7_ICELAKE_SERVER},
{"cascadelake", M_INTEL_COREI7_CASCADELAKE},
{"bonnell", M_INTEL_BONNELL},
{"silvermont", M_INTEL_SILVERMONT},
{"goldmont", M_INTEL_GOLDMONT},

3
gcc/doc/extend.texi
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@ -20768,6 +20768,9 @@ Intel Core i7 Ice Lake Client CPU.
@item icelake-server
Intel Core i7 Ice Lake Server CPU.
@item cascadelake
Intel Core i7 Cascadelake CPU.
@item bonnell
Intel Atom Bonnell CPU.

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2018-12-18 Wei Xiao <wei3.xiao@intel.com>
* g++.target/i386/mv16.C: Handle new march.
* gcc.target/i386/builtin_target.c: Ditto.
2018-12-17 Peter Bergner <bergner@linux.ibm.com>
PR target/87870

6
gcc/testsuite/g++.target/i386/mv16.C
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@ -68,6 +68,10 @@ int __attribute__ ((target("arch=icelake-server"))) foo () {
return 18;
}
int __attribute__ ((target("arch=cascadelake"))) foo () {
return 19;
}
int main ()
{
int val = foo ();
@ -94,6 +98,8 @@ int main ()
assert (val == 17);
else if (__builtin_cpu_is ("icelake-server"))
assert (val == 18);
else if (__builtin_cpu_is ("cascadelake"))
assert (val == 19);
else
assert (val == 0);

16
gcc/testsuite/gcc.target/i386/builtin_target.c
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@ -108,10 +108,18 @@ check_intel_cpu_model (unsigned int family, unsigned int model,
assert (__builtin_cpu_is ("skylake"));
break;
case 0x55:
/* Skylake with AVX-512 support. */
assert (__builtin_cpu_is ("corei7"));
assert (__builtin_cpu_is ("skylake-avx512"));
break;
{
unsigned int eax, ebx, ecx, edx;
__cpuid_count (7, 0, eax, ebx, ecx, edx);
assert (__builtin_cpu_is ("corei7"));
if (ecx & bit_AVX512VNNI)
/* Cascade Lake. */
assert (__builtin_cpu_is ("cascadelake"));
else
/* Skylake with AVX-512 support. */
assert (__builtin_cpu_is ("skylake-avx512"));
break;
}
case 0x66:
/* Cannon Lake. */
assert (__builtin_cpu_is ("cannonlake"));

5
libgcc/ChangeLog
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@ -1,3 +1,8 @@
2018-12-18 Wei Xiao <wei3.xiao@intel.com>
* config/i386/cpuinfo.c (get_intel_cpu): Handle cascadelake.
* config/i386/cpuinfo.h: Add INTEL_COREI7_CASCADELAKE.
2018-12-12 Rasmus Villemoes <rv@rasmusvillemoes.dk>
* config/rs6000/tramp.S (__trampoline_setup): Also emit .size

14
libgcc/config/i386/cpuinfo.c
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@ -215,9 +215,17 @@ get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id)
__cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE;
break;
case 0x55:
/* Skylake with AVX-512 support. */
__cpu_model.__cpu_type = INTEL_COREI7;
__cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE_AVX512;
{
unsigned int eax, ebx, ecx, edx;
__cpu_model.__cpu_type = INTEL_COREI7;
__cpuid_count (7, 0, eax, ebx, ecx, edx);
if (ecx & bit_AVX512VNNI)
/* Cascade Lake. */
__cpu_model.__cpu_subtype = INTEL_COREI7_CASCADELAKE;
else
/* Skylake with AVX-512 support. */
__cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE_AVX512;
}
break;
case 0x66:
/* Cannon Lake. */

1
libgcc/config/i386/cpuinfo.h
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@ -76,6 +76,7 @@ enum processor_subtypes
INTEL_COREI7_ICELAKE_CLIENT,
INTEL_COREI7_ICELAKE_SERVER,
AMDFAM17H_ZNVER2,
INTEL_COREI7_CASCADELAKE,
CPU_SUBTYPE_MAX
};