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lib1funcs.asm (div0): Call raise instead of making syscalls.

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* config/arm/lib1funcs.asm (div0) [L_dvmd_lnx]: Call raise instead
	of making syscalls.
	* config/arm/linux-eabi.h (CLEAR_INSN_CACHE): Define.  Set r7 also.

From-SVN: r107018
This commit is contained in:
Daniel Jacobowitz 2005-11-15 14:32:13 +00:00 committed by Daniel Jacobowitz
parent 9de61fcb9b
commit 5d7c0add81
3 changed files with 25 additions and 18 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2005-11-15 Daniel Jacobowitz <dan@codesourcery.com>
* config/arm/lib1funcs.asm (div0) [L_dvmd_lnx]: Call raise instead
of making syscalls.
* config/arm/linux-eabi.h (CLEAR_INSN_CACHE): Define. Set r7 also.
2005-11-15 Jan Hubicka <jh@suse.cz>
* invoke.texi (large-unit-insns): Document.

20
gcc/config/arm/lib1funcs.asm
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@ -989,29 +989,15 @@ LSYM(Lover12):
#ifdef L_dvmd_lnx
@ GNU/Linux division-by zero handler. Used in place of L_dvmd_tls
/* Constants taken from <asm/unistd.h> and <asm/signal.h> */
/* Constant taken from <asm/signal.h>. */
#define SIGFPE 8
#define __NR_SYSCALL_BASE 0x900000
#define __NR_getpid (__NR_SYSCALL_BASE+ 20)
#define __NR_kill (__NR_SYSCALL_BASE+ 37)
#define __NR_gettid (__NR_SYSCALL_BASE+ 224)
#define __NR_tkill (__NR_SYSCALL_BASE+ 238)
.code 32
FUNC_START div0
stmfd sp!, {r1, lr}
swi __NR_gettid
cmn r0, #1000
swihs __NR_getpid
cmnhs r0, #1000
RETLDM r1 hs
mov ip, r0
mov r1, #SIGFPE
swi __NR_tkill
movs r0, r0
movne r0, ip
swine __NR_kill
mov r0, #SIGFPE
bl SYM(raise) __PLT__
RETLDM r1
FUNC_END div0

17
gcc/config/arm/linux-eabi.h
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@ -1,5 +1,5 @@
/* Configuration file for ARM GNU/Linux EABI targets.
Copyright (C) 2004
Copyright (C) 2004, 2005
Free Software Foundation, Inc.
Contributed by CodeSourcery, LLC
@ -68,3 +68,18 @@
non-AAPCS. */
#undef WCHAR_TYPE
#define WCHAR_TYPE (TARGET_AAPCS_BASED ? "unsigned int" : "long int")
/* Clear the instruction cache from `beg' to `end'. This makes an
inline system call to SYS_cacheflush. It is modified to work with
both the original and EABI-only syscall interfaces. */
#undef CLEAR_INSN_CACHE
#define CLEAR_INSN_CACHE(BEG, END) \
{ \
register unsigned long _beg __asm ("a1") = (unsigned long) (BEG); \
register unsigned long _end __asm ("a2") = (unsigned long) (END); \
register unsigned long _flg __asm ("a3") = 0; \
register unsigned long _scno __asm ("r7") = 0xf0002; \
__asm __volatile ("swi 0x9f0002 @ sys_cacheflush" \
: "=r" (_beg) \
: "0" (_beg), "r" (_end), "r" (_flg), "r" (_scno)); \
}