postreload-gcse.c (reg_changed_after_insn_p): New function.
gcc/ * postreload-gcse.c (reg_changed_after_insn_p): New function. (oprs_unchanged_p): Use it to check all registers in a REG. (record_opr_changes): Look for clobbers in CALL_INSN_FUNCTION_USAGE. (reg_set_between_after_reload_p): Delete. (reg_used_between_after_reload_p): Likewise. (reg_set_or_used_since_bb_start): Likewise. (eliminate_partially_redundant_load): Use reg_changed_after_insn_p and reg_used_between_p instead of reg_set_or_used_since_bb_start. Use reg_set_between_p instead of reg_set_between_after_reload_p. * rtlanal.c (reg_set_p): Check whether REG overlaps regs_invalidated_by_call, rather than just checking the membership of REGNO (REG). From-SVN: r125037
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
dc675301cb
commit
5da20cfe73
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@ -1,3 +1,18 @@
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2007-05-24 Richard Sandiford <rsandifo@nildram.co.uk>
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* postreload-gcse.c (reg_changed_after_insn_p): New function.
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(oprs_unchanged_p): Use it to check all registers in a REG.
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(record_opr_changes): Look for clobbers in CALL_INSN_FUNCTION_USAGE.
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(reg_set_between_after_reload_p): Delete.
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(reg_used_between_after_reload_p): Likewise.
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(reg_set_or_used_since_bb_start): Likewise.
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(eliminate_partially_redundant_load): Use reg_changed_after_insn_p
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and reg_used_between_p instead of reg_set_or_used_since_bb_start.
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Use reg_set_between_p instead of reg_set_between_after_reload_p.
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* rtlanal.c (reg_set_p): Check whether REG overlaps
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regs_invalidated_by_call, rather than just checking the
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membership of REGNO (REG).
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2007-05-24 Zdenek Dvorak <dvorakz@suse.cz>
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* doc/passes.texi: Document predictive commoning.
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@ -197,8 +197,6 @@ static void dump_hash_table (FILE *);
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static bool reg_killed_on_edge (rtx, edge);
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static bool reg_used_on_edge (rtx, edge);
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static rtx reg_set_between_after_reload_p (rtx, rtx, rtx);
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static rtx reg_used_between_after_reload_p (rtx, rtx, rtx);
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static rtx get_avail_load_store_reg (rtx);
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static bool bb_has_well_behaved_predecessors (basic_block);
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@ -470,6 +468,22 @@ dump_hash_table (FILE *file)
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fprintf (file, "\n");
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}
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/* Return true if register X is recorded as being set by an instruction
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whose CUID is greater than the one given. */
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static bool
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reg_changed_after_insn_p (rtx x, int cuid)
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{
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unsigned int regno, end_regno;
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regno = REGNO (x);
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end_regno = END_HARD_REGNO (x);
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do
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if (reg_avail_info[regno] > cuid)
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return true;
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while (++regno < end_regno);
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return false;
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}
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/* Return nonzero if the operands of expression X are unchanged
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1) from the start of INSN's basic block up to but not including INSN
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@ -493,14 +507,9 @@ oprs_unchanged_p (rtx x, rtx insn, bool after_insn)
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/* We are called after register allocation. */
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gcc_assert (REGNO (x) < FIRST_PSEUDO_REGISTER);
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if (after_insn)
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/* If the last CUID setting the insn is less than the CUID of
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INSN, then reg X is not changed in or after INSN. */
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return reg_avail_info[REGNO (x)] < INSN_CUID (insn);
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return !reg_changed_after_insn_p (x, INSN_CUID (insn) - 1);
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else
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/* Reg X is not set before INSN in the current basic block if
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we have not yet recorded the CUID of an insn that touches
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the reg. */
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return reg_avail_info[REGNO (x)] == 0;
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return !reg_changed_after_insn_p (x, 0);
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case MEM:
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if (load_killed_in_block_p (INSN_CUID (insn), x, after_insn))
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@ -717,12 +726,28 @@ record_opr_changes (rtx insn)
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/* Finally, if this is a call, record all call clobbers. */
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if (CALL_P (insn))
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{
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unsigned int regno;
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unsigned int regno, end_regno;
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rtx link, x;
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for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
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if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
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record_last_reg_set_info (insn, regno);
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for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
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if (GET_CODE (XEXP (link, 0)) == CLOBBER)
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{
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x = XEXP (XEXP (link, 0), 0);
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if (REG_P (x))
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{
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gcc_assert (HARD_REGISTER_P (x));
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regno = REGNO (x);
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end_regno = END_HARD_REGNO (x);
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do
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record_last_reg_set_info (insn, regno);
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while (++regno < end_regno);
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}
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}
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if (! CONST_OR_PURE_CALL_P (insn))
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record_last_mem_set_info (insn);
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}
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@ -856,96 +881,6 @@ reg_used_on_edge (rtx reg, edge e)
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return false;
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}
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/* Return the insn that sets register REG or clobbers it in between
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FROM_INSN and TO_INSN (exclusive of those two).
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Just like reg_set_between but for hard registers and not pseudos. */
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static rtx
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reg_set_between_after_reload_p (rtx reg, rtx from_insn, rtx to_insn)
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{
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rtx insn;
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/* We are called after register allocation. */
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gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
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if (from_insn == to_insn)
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return NULL_RTX;
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for (insn = NEXT_INSN (from_insn);
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insn != to_insn;
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insn = NEXT_INSN (insn))
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if (INSN_P (insn))
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{
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if (set_of (reg, insn) != NULL_RTX)
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return insn;
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if ((CALL_P (insn)
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&& call_used_regs[REGNO (reg)])
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|| find_reg_fusage (insn, CLOBBER, reg))
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return insn;
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if (FIND_REG_INC_NOTE (insn, reg))
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return insn;
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}
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return NULL_RTX;
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}
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/* Return the insn that uses register REG in between FROM_INSN and TO_INSN
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(exclusive of those two). Similar to reg_used_between but for hard
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registers and not pseudos. */
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static rtx
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reg_used_between_after_reload_p (rtx reg, rtx from_insn, rtx to_insn)
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{
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rtx insn;
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/* We are called after register allocation. */
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gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
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if (from_insn == to_insn)
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return NULL_RTX;
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for (insn = NEXT_INSN (from_insn);
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insn != to_insn;
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insn = NEXT_INSN (insn))
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if (INSN_P (insn))
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{
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if (reg_overlap_mentioned_p (reg, PATTERN (insn))
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|| (CALL_P (insn)
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&& call_used_regs[REGNO (reg)])
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|| find_reg_fusage (insn, USE, reg)
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|| find_reg_fusage (insn, CLOBBER, reg))
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return insn;
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if (FIND_REG_INC_NOTE (insn, reg))
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return insn;
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}
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return NULL_RTX;
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}
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/* Return true if REG is used, set, or killed between the beginning of
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basic block BB and UP_TO_INSN. Caches the result in reg_avail_info. */
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static bool
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reg_set_or_used_since_bb_start (rtx reg, basic_block bb, rtx up_to_insn)
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{
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rtx insn, start = PREV_INSN (BB_HEAD (bb));
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if (reg_avail_info[REGNO (reg)] != 0)
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return true;
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insn = reg_used_between_after_reload_p (reg, start, up_to_insn);
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if (! insn)
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insn = reg_set_between_after_reload_p (reg, start, up_to_insn);
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if (insn)
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reg_avail_info[REGNO (reg)] = INSN_CUID (insn);
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return insn != NULL_RTX;
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}
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/* Return the loaded/stored register of a load/store instruction. */
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static rtx
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@ -1037,7 +972,8 @@ eliminate_partially_redundant_load (basic_block bb, rtx insn,
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/* Check that the loaded register is not used, set, or killed from the
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beginning of the block. */
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if (reg_set_or_used_since_bb_start (dest, bb, insn))
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if (reg_changed_after_insn_p (dest, 0)
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|| reg_used_between_p (dest, PREV_INSN (BB_HEAD (bb)), insn))
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return;
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/* Check potential for replacing load with copy for predecessors. */
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@ -1068,8 +1004,7 @@ eliminate_partially_redundant_load (basic_block bb, rtx insn,
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avail_insn = NULL;
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continue;
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}
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if (! reg_set_between_after_reload_p (avail_reg, avail_insn,
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next_pred_bb_end))
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if (!reg_set_between_p (avail_reg, avail_insn, next_pred_bb_end))
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/* AVAIL_INSN remains non-null. */
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break;
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else
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@ -825,8 +825,8 @@ reg_set_p (rtx reg, rtx insn)
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|| (CALL_P (insn)
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&& ((REG_P (reg)
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&& REGNO (reg) < FIRST_PSEUDO_REGISTER
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&& TEST_HARD_REG_BIT (regs_invalidated_by_call,
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REGNO (reg)))
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&& overlaps_hard_reg_set_p (regs_invalidated_by_call,
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GET_MODE (reg), REGNO (reg)))
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|| MEM_P (reg)
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|| find_reg_fusage (insn, CLOBBER, reg)))))
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return 1;
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