s390.c: Follow spelling convention.
* config/s390/s390.c: Follow spelling convention. * config/sh/lib1funcs.asm: Likewise. * config/sh/sh.c: Likewise. * config/sh/sh.h: Likewise. * config/sparc/sparc.c: Likewise. * config/sparc/sparc.h: Likewise. * config/sparc/sparc.md: Likewise. * config/stormy16/stormy16.c: Likewise. * config/stormy16/stormy16.h: Likewise. * config/v850/v850.c: Likewise. * config/v850/v850.h: Likewise. * config/vax/vax.c: Likewise. * config/vax/vax.h: Likewise. From-SVN: r57276
This commit is contained in:
parent
a2f2457fa4
commit
5e7a8ee032
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@ -1,3 +1,19 @@
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2002-09-18 Kazu Hirata <kazu@cs.umass.edu>
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* config/s390/s390.c: Follow spelling convention.
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* config/sh/lib1funcs.asm: Likewise.
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* config/sh/sh.c: Likewise.
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* config/sh/sh.h: Likewise.
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* config/sparc/sparc.c: Likewise.
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* config/sparc/sparc.h: Likewise.
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* config/sparc/sparc.md: Likewise.
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* config/stormy16/stormy16.c: Likewise.
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* config/stormy16/stormy16.h: Likewise.
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* config/v850/v850.c: Likewise.
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* config/v850/v850.h: Likewise.
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* config/vax/vax.c: Likewise.
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* config/vax/vax.h: Likewise.
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2002-09-18 Nick Clifton <nickc@redhat.com>
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* config/rs60000/rs6000.c (rs6000_emit_move): Handle V1DImode moves.
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@ -797,7 +797,7 @@ s390_extract_qi (op, mode, part)
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LEVEL is the optimization level specified; 2 if `-O2' is
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specified, 1 if `-O' is specified, and 0 if neither is specified.
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SIZE is non-zero if `-Os' is specified and zero otherwise. */
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SIZE is nonzero if `-Os' is specified and zero otherwise. */
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void
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optimization_options (level, size)
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@ -1607,10 +1607,10 @@ LOCAL(no_lo_adj):
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would require a lot of instructions to do the shifts just right. Using
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the full 64 bit shift result to multiply with the divisor would require
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four extra instructions for the upper 32 bits (shift / mulu / shift / sub).
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Fortunately, if the upper 32 bits of the shift result are non-zero, we
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Fortunately, if the upper 32 bits of the shift result are nonzero, we
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know that the rest after taking this partial result into account will
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fit into 32 bits. So we just clear the upper 32 bits of the rest if the
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upper 32 bits of the partial result are non-zero. */
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upper 32 bits of the partial result are nonzero. */
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#endif /* __SHMEDIA__ */
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#endif /* L_udivdi3 */
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@ -1755,10 +1755,10 @@ LOCAL(no_lo_adj):
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would require a lot of instructions to do the shifts just right. Using
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the full 64 bit shift result to multiply with the divisor would require
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four extra instructions for the upper 32 bits (shift / mulu / shift / sub).
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Fortunately, if the upper 32 bits of the shift result are non-zero, we
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Fortunately, if the upper 32 bits of the shift result are nonzero, we
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know that the rest after taking this partial result into account will
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fit into 32 bits. So we just clear the upper 32 bits of the rest if the
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upper 32 bits of the partial result are non-zero. */
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upper 32 bits of the partial result are nonzero. */
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#endif /* __SHMEDIA__ */
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#endif /* L_umoddi3 */
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@ -2508,7 +2508,7 @@ dump_table (scan)
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pool_window_last = 0;
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}
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/* Return non-zero if constant would be an ok source for a
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/* Return nonzero if constant would be an ok source for a
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mov.w instead of a mov.l. */
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static int
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@ -2520,7 +2520,7 @@ hi_const (src)
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&& INTVAL (src) <= 32767);
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}
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/* Non-zero if the insn is a move instruction which needs to be fixed. */
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/* Nonzero if the insn is a move instruction which needs to be fixed. */
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/* ??? For a DImode/DFmode moves, we don't need to fix it if each half of the
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CONST_DOUBLE input value is CONST_OK_FOR_I. For a SFmode move, we don't
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@ -6429,7 +6429,7 @@ branch_dest (branch)
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return INSN_ADDRESSES (dest_uid);
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}
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/* Return non-zero if REG is not used after INSN.
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/* Return nonzero if REG is not used after INSN.
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We assume REG is a reload reg, and therefore does
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not live past labels. It may live past calls or jumps though. */
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int
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@ -6971,7 +6971,7 @@ sh_can_redirect_branch (branch1, branch2)
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return 0;
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}
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/* Return non-zero if register old_reg can be renamed to register new_reg. */
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/* Return nonzero if register old_reg can be renamed to register new_reg. */
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int
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sh_hard_regno_rename_ok (old_reg, new_reg)
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unsigned int old_reg ATTRIBUTE_UNUSED;
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@ -1528,7 +1528,7 @@ enum sh_arg_class { SH_ARG_INT = 0, SH_ARG_FLOAT = 1 };
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struct sh_args {
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int arg_count[2];
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int force_mem;
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/* Non-zero if a prototype is available for the function. */
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/* Nonzero if a prototype is available for the function. */
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int prototype_p;
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/* The number of an odd floating-point register, that should be used
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for the next argument of type float. */
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@ -455,7 +455,7 @@ v9_regcmp_p (code)
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/* Operand constraints. */
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/* Return non-zero only if OP is a register of mode MODE,
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/* Return nonzero only if OP is a register of mode MODE,
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or const0_rtx. */
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int
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@ -476,7 +476,7 @@ reg_or_0_operand (op, mode)
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return 0;
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}
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/* Return non-zero only if OP is const1_rtx. */
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/* Return nonzero only if OP is const1_rtx. */
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int
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const1_operand (op, mode)
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@ -3074,7 +3074,7 @@ short_branch (uid1, uid2)
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return 0;
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}
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/* Return non-zero if REG is not used after INSN.
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/* Return nonzero if REG is not used after INSN.
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We assume REG is a reload reg, and therefore does
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not live past labels or calls or jumps. */
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int
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@ -5370,11 +5370,11 @@ sparc_va_arg (valist, type)
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XEXP (OP, 0) is assumed to be a condition code register (integer or
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floating point) and its mode specifies what kind of comparison we made.
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REVERSED is non-zero if we should reverse the sense of the comparison.
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REVERSED is nonzero if we should reverse the sense of the comparison.
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ANNUL is non-zero if we should generate an annulling branch.
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ANNUL is nonzero if we should generate an annulling branch.
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NOOP is non-zero if we have to follow this branch by a noop.
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NOOP is nonzero if we have to follow this branch by a noop.
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INSN, if set, is the insn. */
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@ -5803,11 +5803,11 @@ sparc_emit_floatunsdi (operands)
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operand number of the reg. OP is the conditional expression. The mode
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of REG says what kind of comparison we made.
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REVERSED is non-zero if we should reverse the sense of the comparison.
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REVERSED is nonzero if we should reverse the sense of the comparison.
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ANNUL is non-zero if we should generate an annulling branch.
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ANNUL is nonzero if we should generate an annulling branch.
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NOOP is non-zero if we have to follow this branch by a noop. */
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NOOP is nonzero if we have to follow this branch by a noop. */
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char *
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output_v9branch (op, dest, reg, label, reversed, annul, noop, insn)
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@ -411,7 +411,7 @@ extern int target_flags;
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#define MASK_V9 0x40
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#define TARGET_V9 (target_flags & MASK_V9)
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/* Non-zero to generate code that uses the instructions deprecated in
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/* Nonzero to generate code that uses the instructions deprecated in
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the v9 architecture. This option only applies to v9 systems. */
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/* ??? This isn't user selectable yet. It's used to enable such insns
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on 32 bit v9 systems and for the moment they're permanently disabled
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@ -423,7 +423,7 @@ extern int target_flags;
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#define MASK_ISA \
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(MASK_V8 + MASK_SPARCLITE + MASK_SPARCLET + MASK_V9 + MASK_DEPRECATED_V8_INSNS)
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/* Non-zero means don't pass `-assert pure-text' to the linker. */
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/* Nonzero means don't pass `-assert pure-text' to the linker. */
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#define MASK_IMPURE_TEXT 0x100
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#define TARGET_IMPURE_TEXT (target_flags & MASK_IMPURE_TEXT)
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@ -446,7 +446,7 @@ extern int target_flags;
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#define MASK_HARD_QUAD 0x800
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#define TARGET_HARD_QUAD (target_flags & MASK_HARD_QUAD)
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/* Non-zero on little-endian machines. */
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/* Nonzero on little-endian machines. */
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/* ??? Little endian support currently only exists for sparclet-aout and
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sparc64-elf configurations. May eventually want to expand the support
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to all targets, but for now it's kept local to only those two. */
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@ -467,14 +467,14 @@ extern int target_flags;
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/* 0x20000,0x40000 unused */
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/* Non-zero means use a stack bias of 2047. Stack offsets are obtained by
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/* Nonzero means use a stack bias of 2047. Stack offsets are obtained by
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adding 2047 to %sp. This option is for v9 only and is the default. */
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#define MASK_STACK_BIAS 0x80000
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#define TARGET_STACK_BIAS (target_flags & MASK_STACK_BIAS)
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/* 0x100000,0x200000 unused */
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/* Non-zero means -m{,no-}fpu was passed on the command line. */
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/* Nonzero means -m{,no-}fpu was passed on the command line. */
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#define MASK_FPU_SET 0x400000
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#define TARGET_FPU_SET (target_flags & MASK_FPU_SET)
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@ -948,7 +948,7 @@ do \
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call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
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} \
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/* If the user has passed -f{fixed,call-{used,saved}}-g5 */ \
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/* then honour it. */ \
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/* then honor it. */ \
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if (TARGET_ARCH32 && fixed_regs[5]) \
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fixed_regs[5] = 1; \
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else if (TARGET_ARCH64 && fixed_regs[5] == 2) \
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@ -973,7 +973,7 @@ do \
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fixed_regs[regno] = 1; \
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} \
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/* If the user has passed -f{fixed,call-{used,saved}}-g2 */ \
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/* then honour it. Likewise with g3 and g4. */ \
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/* then honor it. Likewise with g3 and g4. */ \
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if (fixed_regs[2] == 2) \
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fixed_regs[2] = ! TARGET_APP_REGS; \
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if (fixed_regs[3] == 2) \
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@ -1723,8 +1723,8 @@ extern char leaf_reg_remap[];
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struct sparc_args {
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int words; /* number of words passed so far */
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int prototype_p; /* non-zero if a prototype is present */
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int libcall_p; /* non-zero if a library call */
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int prototype_p; /* nonzero if a prototype is present */
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int libcall_p; /* nonzero if a library call */
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};
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#define CUMULATIVE_ARGS struct sparc_args
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@ -2493,7 +2493,7 @@ do { \
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processing is needed. */
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#define SELECT_CC_MODE(OP,X,Y) select_cc_mode ((OP), (X), (Y))
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/* Return non-zero if MODE implies a floating point inequality can be
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/* Return nonzero if MODE implies a floating point inequality can be
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reversed. For SPARC this is always true because we have a full
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compliment of ordered and unordered comparisons, but until generic
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code knows how to reverse it correctly we keep the old definition. */
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@ -3462,7 +3462,7 @@
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;; SPARC V9 conditional move instructions.
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;; We can handle larger constants here for some flavors, but for now we keep
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;; it simple and only allow those constants supported by all flavours.
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;; it simple and only allow those constants supported by all flavors.
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;; Note that emit_conditional_move canonicalizes operands 2,3 so that operand
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;; 3 contains the constant if one is present, but we handle either for
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;; generality (sparc.c puts a constant in operand 2).
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|
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@ -254,7 +254,7 @@ xstormy16_split_cbranch (mode, label, comparison, dest, carry)
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OP is the conditional expression, or NULL for branch-always.
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REVERSED is non-zero if we should reverse the sense of the comparison.
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REVERSED is nonzero if we should reverse the sense of the comparison.
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INSN is the insn. */
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@ -331,7 +331,7 @@ xstormy16_output_cbranch_hi (op, label, reversed, insn)
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OP is the conditional expression (OP is never NULL_RTX).
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REVERSED is non-zero if we should reverse the sense of the comparison.
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REVERSED is nonzero if we should reverse the sense of the comparison.
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INSN is the insn. */
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|
@ -1170,7 +1170,7 @@ xstormy16_build_va_list ()
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return record;
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}
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|
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/* Implement the stdarg/varargs va_start macro. STDARG_P is non-zero if this
|
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/* Implement the stdarg/varargs va_start macro. STDARG_P is nonzero if this
|
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is stdarg.h instead of varargs.h. VALIST is the tree of the va_list
|
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variable to initialize. NEXTARG is the machine independent notion of the
|
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'next' argument after the variable arguments. */
|
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|
|
|
@ -632,7 +632,7 @@ enum reg_class
|
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/* Certain machines have the property that some registers cannot be copied to
|
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some other registers without using memory. Define this macro on those
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machines to be a C expression that is non-zero if objects of mode M in
|
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machines to be a C expression that is nonzero if objects of mode M in
|
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registers of CLASS1 can only be copied to registers of class CLASS2 by
|
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storing a register of CLASS1 into memory and loading that memory location
|
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into a register of CLASS2.
|
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|
@ -675,15 +675,15 @@ enum reg_class
|
|||
few registers of certain classes that there would not be enough registers to
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use as spill registers if this were done.
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Define `SMALL_REGISTER_CLASSES' to be an expression with a non-zero value on
|
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these machines. When this macro has a non-zero value, the compiler allows
|
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Define `SMALL_REGISTER_CLASSES' to be an expression with a nonzero value on
|
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these machines. When this macro has a nonzero value, the compiler allows
|
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registers explicitly used in the rtl to be used as spill registers but
|
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avoids extending the lifetime of these registers.
|
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It is always safe to define this macro with a non-zero value, but if you
|
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It is always safe to define this macro with a nonzero value, but if you
|
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unnecessarily define it, you will reduce the amount of optimizations that
|
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can be performed in some cases. If you do not define this macro with a
|
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non-zero value when it is required, the compiler will run out of spill
|
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nonzero value when it is required, the compiler will run out of spill
|
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registers and print a fatal error message. For most machines, you should
|
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not define this macro at all. */
|
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/* #define SMALL_REGISTER_CLASSES */
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|
@ -1062,7 +1062,7 @@ enum reg_class
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{ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
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}
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/* A C expression that returns non-zero if the compiler is allowed to try to
|
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/* A C expression that returns nonzero if the compiler is allowed to try to
|
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replace register number FROM with register number TO. This macro need only
|
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be defined if `ELIMINABLE_REGS' is defined, and will usually be the constant
|
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1, since most of the cases preventing register elimination are things that
|
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|
@ -1242,7 +1242,7 @@ enum reg_class
|
|||
You may use the macro `MUST_PASS_IN_STACK (MODE, TYPE)' in the definition of
|
||||
this macro to determine if this argument is of a type that must be passed in
|
||||
the stack. If `REG_PARM_STACK_SPACE' is not defined and `FUNCTION_ARG'
|
||||
returns non-zero for such an argument, the compiler will abort. If
|
||||
returns nonzero for such an argument, the compiler will abort. If
|
||||
`REG_PARM_STACK_SPACE' is defined, the argument will be computed in the
|
||||
stack and then loaded into a register. */
|
||||
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
|
||||
|
@ -1724,7 +1724,7 @@ enum reg_class
|
|||
#define BUILD_VA_LIST_TYPE(NODE) \
|
||||
((NODE) = xstormy16_build_va_list ())
|
||||
|
||||
/* Implement the stdarg/varargs va_start macro. STDARG_P is non-zero if this
|
||||
/* Implement the stdarg/varargs va_start macro. STDARG_P is nonzero if this
|
||||
is stdarg.h instead of varargs.h. VALIST is the tree of the va_list
|
||||
variable to initialize. NEXTARG is the machine independent notion of the
|
||||
'next' argument after the variable arguments. If not defined, a standard
|
||||
|
@ -2368,10 +2368,10 @@ do { \
|
|||
times greater than aligned accesses, for example if they are emulated in a
|
||||
trap handler.
|
||||
|
||||
When this macro is non-zero, the compiler will act as if `STRICT_ALIGNMENT'
|
||||
were non-zero when generating code for block moves. This can cause
|
||||
When this macro is nonzero, the compiler will act as if `STRICT_ALIGNMENT'
|
||||
were nonzero when generating code for block moves. This can cause
|
||||
significantly more instructions to be produced. Therefore, do not set this
|
||||
macro non-zero if unaligned accesses only add a cycle or two to the time for
|
||||
macro nonzero if unaligned accesses only add a cycle or two to the time for
|
||||
a memory access.
|
||||
|
||||
If the value of this macro is always zero, it need not be defined. */
|
||||
|
@ -2613,7 +2613,7 @@ do { \
|
|||
/* #define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) */
|
||||
|
||||
/* You may define this macro as a C expression. You should define the
|
||||
expression to have a non-zero value if GNU CC should output the
|
||||
expression to have a nonzero value if GNU CC should output the
|
||||
constant pool for a function before the code for the function, or
|
||||
a zero value if GNU CC should output the constant pool after the
|
||||
function. If you do not define this macro, the usual case, GNU CC
|
||||
|
@ -3758,7 +3758,7 @@ do { \
|
|||
/* A C expression that is nonzero if on this machine the number of bits
|
||||
actually used for the count of a shift operation is equal to the number of
|
||||
bits needed to represent the size of the object being shifted. When this
|
||||
macro is non-zero, the compiler will assume that it is safe to omit a
|
||||
macro is nonzero, the compiler will assume that it is safe to omit a
|
||||
sign-extend, zero-extend, and certain bitwise `and' instructions that
|
||||
truncates the count of a shift operation. On machines that have
|
||||
instructions that act on bitfields at variable positions, which may include
|
||||
|
@ -3869,7 +3869,7 @@ do { \
|
|||
instructions. */
|
||||
/* #define STORE_FLAG_VALUE */
|
||||
|
||||
/* A C expression that gives a non-zero floating point value that is returned
|
||||
/* A C expression that gives a nonzero floating point value that is returned
|
||||
when comparison operators with floating-point results are true. Define this
|
||||
macro on machine that have comparison operations that return floating-point
|
||||
values. If there are no such operations, do not define this macro. */
|
||||
|
|
|
@ -2368,7 +2368,7 @@ register_is_ok_for_epilogue (op, mode)
|
|||
&& (((REGNO (op) >= 20) && REGNO (op) <= 31)));
|
||||
}
|
||||
|
||||
/* Return non-zero if the given RTX is suitable for collapsing into
|
||||
/* Return nonzero if the given RTX is suitable for collapsing into
|
||||
jump to a function epilogue. */
|
||||
int
|
||||
pattern_is_ok_for_epilogue (op, mode)
|
||||
|
@ -2547,7 +2547,7 @@ construct_restore_jr (op)
|
|||
}
|
||||
|
||||
|
||||
/* Return non-zero if the given RTX is suitable for collapsing into
|
||||
/* Return nonzero if the given RTX is suitable for collapsing into
|
||||
a jump to a function prologue. */
|
||||
int
|
||||
pattern_is_ok_for_prologue (op, mode)
|
||||
|
@ -2947,7 +2947,7 @@ v850_insert_attributes (decl, attr_ptr)
|
|||
}
|
||||
}
|
||||
|
||||
/* Return non-zero if the given RTX is suitable
|
||||
/* Return nonzero if the given RTX is suitable
|
||||
for collapsing into a DISPOSE instruction. */
|
||||
|
||||
int
|
||||
|
@ -3137,7 +3137,7 @@ construct_dispose_instruction (op)
|
|||
return buff;
|
||||
}
|
||||
|
||||
/* Return non-zero if the given RTX is suitable
|
||||
/* Return nonzero if the given RTX is suitable
|
||||
for collapsing into a PREPARE instruction. */
|
||||
|
||||
int
|
||||
|
|
|
@ -249,7 +249,7 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max];
|
|||
LEVEL is the optimization level specified; 2 if `-O2' is
|
||||
specified, 1 if `-O' is specified, and 0 if neither is specified.
|
||||
|
||||
SIZE is non-zero if `-Os' is specified, 0 otherwise.
|
||||
SIZE is nonzero if `-Os' is specified, 0 otherwise.
|
||||
|
||||
You should not use this macro to change options that are not
|
||||
machine-specific. These should uniformly selected by the same
|
||||
|
@ -664,7 +664,7 @@ enum reg_class
|
|||
{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
|
||||
{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }} \
|
||||
|
||||
/* A C expression that returns non-zero if the compiler is allowed to
|
||||
/* A C expression that returns nonzero if the compiler is allowed to
|
||||
try to replace register number FROM-REG with register number
|
||||
TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
|
||||
defined, and will usually be the constant 1, since most of the
|
||||
|
|
|
@ -318,7 +318,7 @@ print_operand_address (file, addr)
|
|||
else
|
||||
abort ();
|
||||
|
||||
/* If REG1 is non-zero, figure out if it is a base or index register. */
|
||||
/* If REG1 is nonzero, figure out if it is a base or index register. */
|
||||
if (reg1)
|
||||
{
|
||||
if (breg != 0 || (offset && GET_CODE (offset) == MEM))
|
||||
|
|
|
@ -630,7 +630,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
|
|||
|| GET_CODE (X) == CONST_INT)
|
||||
|
||||
|
||||
/* Non-zero if X is an address which can be indirected. External symbols
|
||||
/* Nonzero if X is an address which can be indirected. External symbols
|
||||
could be in a sharable image library, so we disallow those. */
|
||||
|
||||
#define INDIRECTABLE_ADDRESS_P(X) \
|
||||
|
@ -645,7 +645,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
|
|||
|
||||
#define INDIRECTABLE_CONSTANT_ADDRESS_P(X) CONSTANT_ADDRESS_P(X)
|
||||
|
||||
/* Non-zero if X is an address which can be indirected. */
|
||||
/* Nonzero if X is an address which can be indirected. */
|
||||
#define INDIRECTABLE_ADDRESS_P(X) \
|
||||
(CONSTANT_ADDRESS_P (X) \
|
||||
|| (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
|
||||
|
|
Loading…
Reference in New Issue