recog.c (preprocess_constraints): Don't skip disabled alternatives.
gcc/ * recog.c (preprocess_constraints): Don't skip disabled alternatives. * ira-lives.c (check_and_make_def_conflict): Check for disabled alternatives. (make_early_clobber_and_input_conflicts): Likewise. * config/i386/i386.c (ix86_legitimate_combined_insn): Likewise. From-SVN: r211239
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@ -1,3 +1,11 @@
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2014-06-04 Richard Sandiford <rdsandiford@googlemail.com>
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* recog.c (preprocess_constraints): Don't skip disabled alternatives.
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* ira-lives.c (check_and_make_def_conflict): Check for disabled
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alternatives.
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(make_early_clobber_and_input_conflicts): Likewise.
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* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
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2014-06-04 Richard Sandiford <rdsandiford@googlemail.com>
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* recog.h (alternative_class): New function.
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@ -5875,8 +5875,11 @@ ix86_legitimate_combined_insn (rtx insn)
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/* Operand has no constraints, anything is OK. */
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win = !n_alternatives;
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alternative_mask enabled = recog_data.enabled_alternatives;
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for (j = 0; j < n_alternatives; j++, op_alt += n_operands)
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{
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if (!TEST_BIT (enabled, j))
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continue;
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if (op_alt[i].anything_ok
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|| (op_alt[i].matches != -1
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&& operands_match_p
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@ -641,8 +641,11 @@ check_and_make_def_conflict (int alt, int def, enum reg_class def_cl)
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/* If there's any alternative that allows USE to match DEF, do not
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record a conflict. If that causes us to create an invalid
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instruction due to the earlyclobber, reload must fix it up. */
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alternative_mask enabled = recog_data.enabled_alternatives;
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for (alt1 = 0; alt1 < recog_data.n_alternatives; alt1++)
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{
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if (!TEST_BIT (enabled, alt1))
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continue;
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operand_alternative *op_alt1 = &recog_op_alt[alt1 * n_operands];
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if (op_alt1[use].matches == def
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|| (use < n_operands - 1
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@ -688,30 +691,32 @@ make_early_clobber_and_input_conflicts (void)
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int n_alternatives = recog_data.n_alternatives;
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int n_operands = recog_data.n_operands;
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alternative_mask enabled = recog_data.enabled_alternatives;
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operand_alternative *op_alt = recog_op_alt;
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for (alt = 0; alt < n_alternatives; alt++, op_alt += n_operands)
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for (def = 0; def < n_operands; def++)
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{
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def_cl = NO_REGS;
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if (op_alt[def].earlyclobber)
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{
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if (op_alt[def].anything_ok)
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def_cl = ALL_REGS;
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else
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def_cl = op_alt[def].cl;
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check_and_make_def_conflict (alt, def, def_cl);
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}
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if ((def_match = op_alt[def].matches) >= 0
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&& (op_alt[def_match].earlyclobber
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|| op_alt[def].earlyclobber))
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{
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if (op_alt[def_match].anything_ok)
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def_cl = ALL_REGS;
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else
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def_cl = op_alt[def_match].cl;
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check_and_make_def_conflict (alt, def, def_cl);
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}
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}
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if (TEST_BIT (enabled, alt))
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for (def = 0; def < n_operands; def++)
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{
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def_cl = NO_REGS;
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if (op_alt[def].earlyclobber)
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{
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if (op_alt[def].anything_ok)
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def_cl = ALL_REGS;
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else
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def_cl = op_alt[def].cl;
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check_and_make_def_conflict (alt, def, def_cl);
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}
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if ((def_match = op_alt[def].matches) >= 0
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&& (op_alt[def_match].earlyclobber
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|| op_alt[def].earlyclobber))
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{
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if (op_alt[def_match].anything_ok)
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def_cl = ALL_REGS;
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else
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def_cl = op_alt[def_match].cl;
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check_and_make_def_conflict (alt, def, def_cl);
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}
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}
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}
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/* Mark early clobber hard registers of the current INSN as live (if
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@ -2352,12 +2352,6 @@ preprocess_constraints (void)
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op_alt[i].matches = -1;
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op_alt[i].matched = -1;
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if (!TEST_BIT (recog_data.enabled_alternatives, j))
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{
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p = skip_alternative (p);
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continue;
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}
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if (*p == '\0' || *p == ',')
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{
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op_alt[i].anything_ok = 1;
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