x86: Always return pseudo register in ix86_gen_scratch_sse_rtx

ix86_gen_scratch_sse_rtx returns XMM7/XMM15/XMM31 as a scratch vector
register to prevent RTL optimizers from removing vector register.  It
introduces a conflict with explicit XMM7/XMM15/XMM31 usage and when it
is called by RTL optimizers, it may introduce conflicting usages of
XMM7/XMM15/XMM31.

Change ix86_gen_scratch_sse_rtx to always return a pseudo register and
xfail x86 tests which are optimized with a hard scratch register.

gcc/

	PR target/104704
	* config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Always return
	a pseudo register.

gcc/testsuite/

	PR target/104704
	* gcc.target/i386/incoming-11.c: Xfail.
	* gcc.target/i386/pieces-memset-3.c: Likewise.
	* gcc.target/i386/pieces-memset-37.c: Likewise.
	* gcc.target/i386/pieces-memset-39.c: Likewise.
	* gcc.target/i386/pieces-memset-46.c: Likewise.
	* gcc.target/i386/pieces-memset-47.c: Likewise.
	* gcc.target/i386/pieces-memset-48.c: Likewise.
	* gcc.target/i386/pr90773-5.c: Likewise.
	* gcc.target/i386/pr90773-14.c: Likewise.
	* gcc.target/i386/pr90773-17.c: Likewise.
	* gcc.target/i386/pr100865-8a.c: Likewise.
	* gcc.target/i386/pr100865-8c.c: Likewise.
	* gcc.target/i386/pr100865-9c.c: Likewise.
	* gcc.target/i386/pieces-memset-21.c: Always expect vzeroupper.
	* gcc.target/i386/pr82941-1.c: Likewise.
	* gcc.target/i386/pr82942-1.c: Likewise.
	* gcc.target/i386/pr82990-1.c: Likewise.
	* gcc.target/i386/pr82990-3.c: Likewise.
	* gcc.target/i386/pr82990-5.c: Likewise.
	* gcc.target/i386/pr100865-11b.c: Expect vmovdqa instead of
	vmovdqa64.
	* gcc.target/i386/pr100865-12b.c: Likewise.
	* gcc.target/i386/pr100865-8b.c: Likewise.
	* gcc.target/i386/pr100865-9b.c: Likewise.
	* gcc.target/i386/pr104704-1.c: New test.
	* gcc.target/i386/pr104704-2.c: Likewise.
	* gcc.target/i386/pr104704-3.c: Likewise.
	* gcc.target/i386/pr104704-4.c: Likewise.
	* gcc.target/i386/pr104704-5.c: Likewise.
	* gcc.target/i386/pr104704-6.c: Likewise.
This commit is contained in:
H.J. Lu 2022-02-26 14:17:23 -08:00
parent fc03ebdcea
commit 609e8c492d
30 changed files with 225 additions and 50 deletions

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@ -23786,24 +23786,7 @@ ix86_optab_supported_p (int op, machine_mode mode1, machine_mode,
rtx
ix86_gen_scratch_sse_rtx (machine_mode mode)
{
if (TARGET_SSE && !lra_in_progress)
{
unsigned int regno;
if (TARGET_64BIT)
{
/* In 64-bit mode, use XMM31 to avoid vzeroupper and always
use XMM31 for CSE. */
if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
regno = LAST_EXT_REX_SSE_REG;
else
regno = LAST_REX_SSE_REG;
}
else
regno = LAST_SSE_REG;
return gen_rtx_REG (mode, regno);
}
else
return gen_reg_rtx (mode);
return gen_reg_rtx (mode);
}
/* Address space support.

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@ -15,4 +15,4 @@ void f()
for (i = 0; i < 100; i++) q[i] = 1;
}
/* { dg-final { scan-assembler-not "andl\[\\t \]*\\$-16,\[\\t \]*%esp" } } */
/* { dg-final { scan-assembler-not "andl\[\\t \]*\\$-16,\[\\t \]*%esp" { xfail *-*-* } } } */

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@ -11,8 +11,7 @@ foo (void)
/* { dg-final { scan-assembler-times "vpxor(?:d|)\[ \\t\]+\[^\n\]*%xmm" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqu(?:64|8)\[ \\t\]+\[^\n\]*%zmm" 1 } } */
/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler "vzeroupper" { target ia32 } } } */
/* { dg-final { scan-assembler "vzeroupper" } } */
/* No need to dynamically realign the stack here. */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
/* Nor use a frame pointer. */

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@ -13,6 +13,6 @@ foo (int x)
/* { dg-final { scan-assembler-times "vinserti64x4\[ \\t\]+\[^\n\]*%zmm" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*%zmm" 1 } } */
/* No need to dynamically realign the stack here. */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" { xfail *-*-* } } } */
/* Nor use a frame pointer. */
/* { dg-final { scan-assembler-not "%\[re\]bp" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-not "%\[re\]bp" { xfail *-*-* } } } */

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@ -10,6 +10,6 @@ foo (int a1, int a2, int a3, int a4, int a5, int a6, int x, char *dst)
/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%ymm" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */
/* No need to dynamically realign the stack here. */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" { xfail *-*-* } } } */
/* Nor use a frame pointer. */
/* { dg-final { scan-assembler-not "%\[re\]bp" } } */
/* { dg-final { scan-assembler-not "%\[re\]bp" { xfail *-*-* } } } */

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@ -11,6 +11,6 @@ foo (int a1, int a2, int a3, int a4, int a5, int a6, int x, char *dst)
/* { dg-final { scan-assembler-not "vinserti64x4" } } */
/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%zmm" 1 } } */
/* No need to dynamically realign the stack here. */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" { xfail *-*-* } } } */
/* Nor use a frame pointer. */
/* { dg-final { scan-assembler-not "%\[re\]bp" } } */
/* { dg-final { scan-assembler-not "%\[re\]bp" { xfail *-*-* } } } */

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@ -10,7 +10,7 @@ foo (void)
}
/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%zmm" 1 } } */
/* { dg-final { scan-assembler-times "vmovw\[ \\t\]+\[^\n\]*%xmm" 1 } } */
/* { dg-final { scan-assembler-times "vmovw\[ \\t\]+\[^\n\]*%xmm" 1 { xfail *-*-* } } } */
/* No need to dynamically realign the stack here. */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
/* Nor use a frame pointer. */

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@ -10,7 +10,7 @@ foo (void)
}
/* { dg-final { scan-assembler-times "vmovdqu(?:8|)\[ \\t\]+\[^\n\]*%xmm" 4 } } */
/* { dg-final { scan-assembler-times "vmovw\[ \\t\]+\[^\n\]*%xmm" 1 } } */
/* { dg-final { scan-assembler-times "vmovw\[ \\t\]+\[^\n\]*%xmm" 1 { xfail *-*-* } } } */
/* No need to dynamically realign the stack here. */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
/* Nor use a frame pointer. */

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@ -10,7 +10,7 @@ foo (void)
}
/* { dg-final { scan-assembler-times "vmovdqu(?:8|)\[ \\t\]+\[^\n\]*%ymm" 2 } } */
/* { dg-final { scan-assembler-times "vmovw\[ \\t\]+\[^\n\]*%xmm" 1 } } */
/* { dg-final { scan-assembler-times "vmovw\[ \\t\]+\[^\n\]*%xmm" 1 { xfail *-*-* } } } */
/* No need to dynamically realign the stack here. */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
/* Nor use a frame pointer. */

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@ -5,4 +5,4 @@
/* { dg-final { scan-assembler-times "movabsq" 1 } } */
/* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */

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@ -5,4 +5,4 @@
/* { dg-final { scan-assembler-times "movabsq" 1 } } */
/* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */

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@ -20,5 +20,5 @@ foo (void)
array[i] = MK_CONST128_BROADCAST_SIGNED (-45);
}
/* { dg-final { scan-assembler-times "(?:vpbroadcastd|vpshufd)\[\\t \]+\[^\n\]*, %xmm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "(?:vpbroadcastd|vpshufd)\[\\t \]+\[^\n\]*, %xmm\[0-9\]+" 1 { xfail *-*-* } } } */
/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */

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@ -4,4 +4,4 @@
#include "pr100865-8a.c"
/* { dg-final { scan-assembler-times "vpbroadcastd\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */

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@ -3,5 +3,5 @@
#include "pr100865-8a.c"
/* { dg-final { scan-assembler-times "vpshufd\[\\t \]+\[^\n\]*, %xmm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vpshufd\[\\t \]+\[^\n\]*, %xmm\[0-9\]+" 1 { xfail *-*-* } } } */
/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */

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@ -4,4 +4,4 @@
#include "pr100865-9a.c"
/* { dg-final { scan-assembler-times "vpbroadcastw\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */

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@ -3,5 +3,5 @@
#include "pr100865-9a.c"
/* { dg-final { scan-assembler-times "vpshufd\[\\t \]+\[^\n\]*, %xmm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vpshufd\[\\t \]+\[^\n\]*, %xmm\[0-9\]+" 1 { xfail *-*-* } } } */
/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */

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@ -0,0 +1,33 @@
/* { dg-do run { target { ! ia32 } } } */
/* { dg-options "-O2 -march=x86-64 -mavx512f" } */
#include <immintrin.h>
__m512d y, z;
int i;
__attribute__((noipa))
int
do_test (void)
{
register int xmm31 __asm ("xmm31") = i;
asm volatile ("" : "+v" (xmm31));
z = y;
register int xmm2 __asm ("xmm2") = xmm31;
asm volatile ("" : "+v" (xmm2));
return xmm2;
}
__attribute__((target("arch=x86-64")))
int
main (void)
{
if (__builtin_cpu_supports ("avx512f"))
{
i = 4;
if (do_test () != 4)
__builtin_abort ();
}
return 0;
}

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@ -0,0 +1,33 @@
/* { dg-do run { target { ! ia32 } } } */
/* { dg-options "-O2 -march=x86-64 -mavx2" } */
#include <immintrin.h>
__m256d y, z;
int i;
__attribute__((noipa))
int
do_test (void)
{
register int xmm15 __asm ("xmm15") = i;
asm volatile ("" : "+v" (xmm15));
z = y;
register int xmm2 __asm ("xmm2") = xmm15;
asm volatile ("" : "+v" (xmm2));
return xmm2;
}
__attribute__((target("arch=x86-64")))
int
main (void)
{
if (__builtin_cpu_supports ("avx2"))
{
i = 4;
if (do_test () != 4)
__builtin_abort ();
}
return 0;
}

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@ -0,0 +1,33 @@
/* { dg-do run { target ia32 } } */
/* { dg-options "-O2 -march=i686 -msse2" } */
#include <immintrin.h>
__m128d y, z;
int i;
__attribute__((noipa))
int
do_test (void)
{
register int xmm7 __asm ("xmm7") = i;
asm volatile ("" : "+v" (xmm7));
z = y;
register int xmm2 __asm ("xmm2") = xmm7;
asm volatile ("" : "+v" (xmm2));
return xmm2;
}
__attribute__((target("arch=i486")))
int
main (void)
{
if (__builtin_cpu_supports ("sse2"))
{
i = 4;
if (do_test () != 4)
__builtin_abort ();
}
return 0;
}

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@ -0,0 +1,33 @@
/* { dg-do run { target { ! ia32 } } } */
/* { dg-options "-O2 -march=x86-64 -mavx512f" } */
#include <immintrin.h>
char z[128];
int i;
__attribute__((noipa))
int
do_test (void)
{
register int xmm31 __asm ("xmm31") = i;
asm volatile ("" : "+v" (xmm31));
__builtin_memset (&z, 0, sizeof (z));
register int xmm2 __asm ("xmm2") = xmm31;
asm volatile ("" : "+v" (xmm2));
return xmm2;
}
__attribute__((target("arch=x86-64")))
int
main (void)
{
if (__builtin_cpu_supports ("avx512f"))
{
i = 4;
if (do_test () != 4)
__builtin_abort ();
}
return 0;
}

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@ -0,0 +1,33 @@
/* { dg-do run { target { ! ia32 } } } */
/* { dg-options "-O2 -march=x86-64 -mtune=skylake -mavx2" } */
#include <immintrin.h>
char z[64];
int i;
__attribute__((noipa))
int
do_test (void)
{
register int xmm15 __asm ("xmm15") = i;
asm volatile ("" : "+v" (xmm15));
__builtin_memset (&z, 0, sizeof (z));
register int xmm2 __asm ("xmm2") = xmm15;
asm volatile ("" : "+v" (xmm2));
return xmm2;
}
__attribute__((target("arch=x86-64")))
int
main (void)
{
if (__builtin_cpu_supports ("avx2"))
{
i = 4;
if (do_test () != 4)
__builtin_abort ();
}
return 0;
}

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@ -0,0 +1,33 @@
/* { dg-do run { target ia32 } } */
/* { dg-options "-O2 -march=i686 -mtune=skylake -msse2" } */
#include <immintrin.h>
char z[16];
int i;
__attribute__((noipa))
int
do_test (void)
{
register int xmm7 __asm ("xmm7") = i;
asm volatile ("" : "+v" (xmm7));
__builtin_memset (&z, 0, sizeof (z));
register int xmm2 __asm ("xmm2") = xmm7;
asm volatile ("" : "+v" (xmm2));
return xmm2;
}
__attribute__((target("arch=i486")))
int
main (void)
{
if (__builtin_cpu_supports ("sse2"))
{
i = 4;
if (do_test () != 4)
__builtin_abort ();
}
return 0;
}

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@ -11,5 +11,4 @@ pr82941 ()
z = y;
}
/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */

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@ -3,5 +3,4 @@
#include "pr82941-1.c"
/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */

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@ -11,5 +11,4 @@ pr82941 ()
z = y;
}
/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */

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@ -3,5 +3,4 @@
#include "pr82941-1.c"
/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */

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@ -11,5 +11,4 @@ pr82941 ()
z = y;
}
/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */

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@ -10,4 +10,4 @@ foo (void)
}
/* { dg-final { scan-assembler-times "movups\[\\t \]+%xmm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */
/* { dg-final { scan-assembler-times "movd\[\\t \]+%xmm\[0-9\]+, 16\\(%\[\^,\]+\\)" 1 } } */
/* { dg-final { scan-assembler-times "movd\[\\t \]+%xmm\[0-9\]+, 16\\(%\[\^,\]+\\)" 1 { xfail *-*-* } } } */

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@ -11,4 +11,4 @@ foo (void)
/* { dg-final { scan-assembler-times "vpbroadcastb" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqu8\[\\t \]+%xmm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */
/* { dg-final { scan-assembler-times "vmovd\[\\t \]+%xmm\[0-9\]+, 15\\(%\[\^,\]+\\)" 1 } } */
/* { dg-final { scan-assembler-times "vmovd\[\\t \]+%xmm\[0-9\]+, 16\\(%\[\^,\]+\\)" 1 { xfail *-*-* } } } */

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@ -10,4 +10,4 @@ foo (void)
}
/* { dg-final { scan-assembler-times "movups\[\\t \]+%xmm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */
/* { dg-final { scan-assembler-times "movq\[\\t \]+%xmm\[0-9\]+, 13\\(%\[\^,\]+\\)" 1 } } */
/* { dg-final { scan-assembler-times "movq\[\\t \]+%xmm\[0-9\]+, 13\\(%\[\^,\]+\\)" 1 { xfail *-*-* } } } */