config.gcc (mips64vr-*-elf*, [...]): Add MIPS_MARCH_CONTROLS_SOFT_FLOAT=1 to $tm_defines.
* config.gcc (mips64vr-*-elf*, mips64vrel-*-elf*): Add MIPS_MARCH_CONTROLS_SOFT_FLOAT=1 to $tm_defines. * config/mips/mips.c (MIPS_MARCH_CONTROLS_SOFT_FLOAT): Default to 0. (override_options): Base default setting of MASK_SOFT_FLOAT on -march if MIPS_MARCH_CONTROLS_SOFT_FLOAT. From-SVN: r58488
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@ -1,3 +1,11 @@
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2002-10-24 Richard Sandiford <rsandifo@redhat.com>
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* config.gcc (mips64vr-*-elf*, mips64vrel-*-elf*): Add
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MIPS_MARCH_CONTROLS_SOFT_FLOAT=1 to $tm_defines.
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* config/mips/mips.c (MIPS_MARCH_CONTROLS_SOFT_FLOAT): Default to 0.
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(override_options): Base default setting of MASK_SOFT_FLOAT on -march
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if MIPS_MARCH_CONTROLS_SOFT_FLOAT.
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2002-10-24 Richard Sandiford <rsandifo@redhat.com>
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* optabs.c (expand_binop): Don't reuse the shift target in the
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@ -1859,7 +1859,7 @@ mips64-*-elf* | mips64el-*-elf*)
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;;
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mips64vr-*-elf* | mips64vrel-*-elf*)
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tm_file="mips/vr.h ${tm_file} mips/elf64.h"
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tm_defines="MIPS_ABI_DEFAULT=ABI_O64"
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tm_defines="MIPS_ABI_DEFAULT=ABI_O64 MIPS_MARCH_CONTROLS_SOFT_FLOAT=1"
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tmake_file=mips/t-vr
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;;
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mips64orion-*-elf* | mips64orionel-*-elf*)
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@ -626,6 +626,11 @@ const struct mips_cpu_info mips_cpu_info_table[] = {
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{ 0, 0, 0 }
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};
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/* Nonzero if -march should decide the default value of MASK_SOFT_FLOAT. */
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#ifndef MIPS_MARCH_CONTROLS_SOFT_FLOAT
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#define MIPS_MARCH_CONTROLS_SOFT_FLOAT 0
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#endif
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/* Initialize the GCC target structure. */
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#undef TARGET_ASM_ALIGNED_HI_OP
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#define TARGET_ASM_ALIGNED_HI_OP "\t.half\t"
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@ -5220,6 +5225,24 @@ override_options ()
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target_flags &= ~MASK_LONG64;
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}
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if (MIPS_MARCH_CONTROLS_SOFT_FLOAT
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&& (target_flags_explicit & MASK_SOFT_FLOAT) == 0)
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{
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/* For some configurations, it is useful to have -march control
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the default setting of MASK_SOFT_FLOAT. */
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switch ((int) mips_arch)
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{
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case PROCESSOR_R4100:
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case PROCESSOR_R4120:
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target_flags |= MASK_SOFT_FLOAT;
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break;
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default:
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target_flags &= ~MASK_SOFT_FLOAT;
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break;
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}
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}
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if (mips_abi != ABI_32 && mips_abi != ABI_O64)
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flag_pcc_struct_return = 0;
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