arm.c (FL_ARCH7EM, [...]): Define.
2009-11-18 Paul Brook <paul@codesourcery.com> Daniel Jacobowitz <dan@codesourcery.com> gcc/ * config/arm/arm.c (FL_ARCH7EM, FL_FOR_ARCH7EM): Define. (arm_arch7em): New variable. (all_architectures): Add armv7e-m. (arm_override_options): Set arm_arch7em. * config/arm/arm.h (TARGET_DSP_MULTIPLY, TARGET_INT_SIMD): Include arm_arch7em. (arm_arch7em): Declare. Co-Authored-By: Daniel Jacobowitz <dan@codesourcery.com> From-SVN: r154299
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@ -1,3 +1,14 @@
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2009-11-18 Paul Brook <paul@codesourcery.com>
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Daniel Jacobowitz <dan@codesourcery.com>
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* config/arm/arm.c (FL_ARCH7EM, FL_FOR_ARCH7EM): Define.
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(arm_arch7em): New variable.
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(all_architectures): Add armv7e-m.
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(arm_override_options): Set arm_arch7em.
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* config/arm/arm.h (TARGET_DSP_MULTIPLY, TARGET_INT_SIMD):
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Include arm_arch7em.
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(arm_arch7em): Declare.
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2009-11-18 Richard Guenther <rguenther@suse.de>
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* lto-streamer-in.c (input_gimple_stmt): Assert that we find
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@ -574,6 +574,8 @@ static int thumb_call_reg_needed;
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#define FL_DIV (1 << 18) /* Hardware divide. */
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#define FL_VFPV3 (1 << 19) /* Vector Floating Point V3. */
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#define FL_NEON (1 << 20) /* Neon instructions. */
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#define FL_ARCH7EM (1 << 21) /* Instructions present in the ARMv7E-M
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architecture. */
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#define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */
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@ -598,6 +600,7 @@ static int thumb_call_reg_needed;
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#define FL_FOR_ARCH7A (FL_FOR_ARCH7 | FL_NOTM)
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#define FL_FOR_ARCH7R (FL_FOR_ARCH7A | FL_DIV)
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#define FL_FOR_ARCH7M (FL_FOR_ARCH7 | FL_DIV)
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#define FL_FOR_ARCH7EM (FL_FOR_ARCH7M | FL_ARCH7EM)
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/* The bits in this mask specify which
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instructions we are allowed to generate. */
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@ -634,6 +637,9 @@ int arm_arch6k = 0;
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/* Nonzero if instructions not present in the 'M' profile can be used. */
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int arm_arch_notm = 0;
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/* Nonzero if instructions present in ARMv7E-M can be used. */
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int arm_arch7em = 0;
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/* Nonzero if this chip can benefit from load scheduling. */
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int arm_ld_sched = 0;
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@ -772,6 +778,7 @@ static const struct processors all_architectures[] =
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{"armv7-a", cortexa8, "7A", FL_CO_PROC | FL_FOR_ARCH7A, NULL},
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{"armv7-r", cortexr4, "7R", FL_CO_PROC | FL_FOR_ARCH7R, NULL},
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{"armv7-m", cortexm3, "7M", FL_CO_PROC | FL_FOR_ARCH7M, NULL},
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{"armv7e-m", cortexm3, "7EM", FL_CO_PROC | FL_FOR_ARCH7EM, NULL},
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{"ep9312", ep9312, "4T", FL_LDSCHED | FL_CIRRUS | FL_FOR_ARCH4, NULL},
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{"iwmmxt", iwmmxt, "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
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{"iwmmxt2", iwmmxt2, "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
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@ -1543,6 +1550,7 @@ arm_override_options (void)
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arm_arch6 = (insn_flags & FL_ARCH6) != 0;
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arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
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arm_arch_notm = (insn_flags & FL_NOTM) != 0;
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arm_arch7em = (insn_flags & FL_ARCH7EM) != 0;
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arm_arch_thumb2 = (insn_flags & FL_THUMB2) != 0;
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arm_arch_xscale = (insn_flags & FL_XSCALE) != 0;
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arm_arch_cirrus = (insn_flags & FL_CIRRUS) != 0;
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@ -252,10 +252,10 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
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/* "DSP" multiply instructions, eg. SMULxy. */
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#define TARGET_DSP_MULTIPLY \
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(TARGET_32BIT && arm_arch5e && arm_arch_notm)
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(TARGET_32BIT && arm_arch5e && (arm_arch_notm || arm_arch7em))
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/* Integer SIMD instructions, and extend-accumulate instructions. */
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#define TARGET_INT_SIMD \
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(TARGET_32BIT && arm_arch6 && arm_arch_notm)
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(TARGET_32BIT && arm_arch6 && (arm_arch_notm || arm_arch7em))
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/* Should MOVW/MOVT be used in preference to a constant pool. */
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#define TARGET_USE_MOVT (arm_arch_thumb2 && !optimize_size)
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@ -399,6 +399,9 @@ extern int arm_arch6;
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/* Nonzero if instructions not present in the 'M' profile can be used. */
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extern int arm_arch_notm;
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/* Nonzero if instructions present in ARMv7E-M can be used. */
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extern int arm_arch7em;
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/* Nonzero if this chip can benefit from load scheduling. */
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extern int arm_ld_sched;
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