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install.texi: Fix typos.

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* doc/install.texi: Fix typos.
	* doc/invoke.texi: Likewise.
	* doc/tm.texi: Likewise.

From-SVN: r68951
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Kazu Hirata 2003-07-05 00:19:47 +00:00 committed by Kazu Hirata
parent 802491c002
commit 61aeb06fe5
4 changed files with 9 additions and 3 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2003-07-04 Kazu Hirata <kazu@cs.umass.edu>
* doc/install.texi: Fix typos.
* doc/invoke.texi: Likewise.
* doc/tm.texi: Likewise.
2003-07-04 Kazu Hirata <kazu@cs.umass.edu> 2003-07-04 Kazu Hirata <kazu@cs.umass.edu>
* config/pa/fptr.c: Fix comment typos. * config/pa/fptr.c: Fix comment typos.

2
gcc/doc/install.texi
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@ -2111,7 +2111,7 @@ require GNU binutils 2.13 or newer. Such subtargets include:
<hr /> <hr />
@end html @end html
@heading @anchor{arm-*-coff}arm-*-coff @heading @anchor{arm-*-coff}arm-*-coff
ARM-family processors. Note that there are two diffierent varieties ARM-family processors. Note that there are two different varieties
of PE format subtarget supported: @code{arm-wince-pe} and of PE format subtarget supported: @code{arm-wince-pe} and
@code{arm-pe} as well as a standard COFF target @code{arm-*-coff}. @code{arm-pe} as well as a standard COFF target @code{arm-*-coff}.

2
gcc/doc/invoke.texi
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@ -3954,7 +3954,7 @@ sense when scheduling before register allocation, i.e.@: with
@item -fsched2-use-superblocks @item -fsched2-use-superblocks
@opindex fsched2-use-superblocks @opindex fsched2-use-superblocks
When schedulilng after register allocation, do use superblock scheduling When scheduling after register allocation, do use superblock scheduling
algorithm. Superblock scheduling allows motion across basic block boundaries algorithm. Superblock scheduling allows motion across basic block boundaries
resulting on faster schedules. This option is experimental, as not all machine resulting on faster schedules. This option is experimental, as not all machine
descriptions used by GCC model the CPU closely enough to avoid unreliable descriptions used by GCC model the CPU closely enough to avoid unreliable

2
gcc/doc/tm.texi
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@ -3256,7 +3256,7 @@ If this macro is not defined, it defaults to
Define this macro if the target's representation for dwarf registers Define this macro if the target's representation for dwarf registers
is different than the internal representation for unwind column. is different than the internal representation for unwind column.
Given a dwarf register, this macro should return the interal unwind Given a dwarf register, this macro should return the internal unwind
column number to use instead. column number to use instead.
See the PowerPC's SPE target for an example. See the PowerPC's SPE target for an example.