re PR target/61794 (internal error: unrecognizable insn, from avx512 extract instruction)
PR target/61794 * config/i386/sse.md (avx512f_vextract<shuffletype>32x4_1_maskm): Fix instruction constraint. (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Ditto. testsuite/ChangeLog: PR target/61794 * gcc.target/i386/pr61794.c: New test. From-SVN: r212824
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2014-07-18 Uros Bizjak <ubizjak@gmail.com>
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PR target/61794
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* config/i386/sse.md (avx512f_vextract<shuffletype>32x4_1_maskm):
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Fix instruction constraint.
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(<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Ditto.
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2014-07-18 Jonathan Wakely <jwakely@redhat.com>
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* doc/extend.texi (Template Instantiation): Remove stray parenthesis.
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@ -1091,7 +1098,7 @@
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* config/aarch64/aarch64.c (aarch64_expand_vec_perm): Delete unused
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variable i.
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2014-07-01 Jan Hubicka <hubicka@ucw.cz>
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2014-07-01 Jan Hubicka <hubicka@ucw.cz>
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* ipa-utils.h (method_class_type, vtable_pointer_value_to_binfo,
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vtable_pointer_value_to_vtable): Constify.
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@ -1107,7 +1114,7 @@
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polymorphic type.
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(compute_known_type_jump_func): Likewise.
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2014-07-01 Jan Hubicka <hubicka@ucw.cz>
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2014-07-01 Jan Hubicka <hubicka@ucw.cz>
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* tree.c (decls_same_for_odr, decls_same_for_odr, types_same_for_odr):
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Remove.
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@ -5892,9 +5892,10 @@
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(match_operand 5 "const_0_to_15_operand")]))
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(match_operand:<ssequartermode> 6 "memory_operand" "0")
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(match_operand:QI 7 "register_operand" "Yk")))]
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"TARGET_AVX512F && (INTVAL (operands[2]) = INTVAL (operands[3]) - 1)
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&& (INTVAL (operands[3]) = INTVAL (operands[4]) - 1)
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&& (INTVAL (operands[4]) = INTVAL (operands[5]) - 1)"
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"TARGET_AVX512F
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&& (INTVAL (operands[2]) == (INTVAL (operands[3]) - 1)
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&& INTVAL (operands[3]) == (INTVAL (operands[4]) - 1)
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&& INTVAL (operands[4]) == (INTVAL (operands[5]) - 1))"
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{
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operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2);
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return "vextract<shuffletype>32x4\t{%2, %1, %0%{%7%}|%0%{%7%}, %1, %2}";
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@ -5914,9 +5915,10 @@
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(match_operand 3 "const_0_to_15_operand")
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(match_operand 4 "const_0_to_15_operand")
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(match_operand 5 "const_0_to_15_operand")])))]
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"TARGET_AVX512F && (INTVAL (operands[2]) = INTVAL (operands[3]) - 1)
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&& (INTVAL (operands[3]) = INTVAL (operands[4]) - 1)
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&& (INTVAL (operands[4]) = INTVAL (operands[5]) - 1)"
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"TARGET_AVX512F
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&& (INTVAL (operands[2]) == (INTVAL (operands[3]) - 1)
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&& INTVAL (operands[3]) == (INTVAL (operands[4]) - 1)
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&& INTVAL (operands[4]) == (INTVAL (operands[5]) - 1))"
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{
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operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2);
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return "vextract<shuffletype>32x4\t{%2, %1, %0<mask_operand6>|%0<mask_operand6>, %1, %2}";
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@ -1,3 +1,8 @@
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2014-07-18 Uros Bizjak <ubizjak@gmail.com>
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PR target/61794
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* gcc.target/i386/pr61794.c: New test.
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2014-07-17 Richard Sandiford <rdsandiford@googlemail.com>
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* gcc.target/mips/umips-lwp-1.c (foo): Use a shift/add sequence
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@ -45,7 +50,7 @@
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2014-07-17 Uros Bizjak <ubizjak@gmail.com>
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* gcc.dg/atomic/c11-atomic-exec-5.c (dg-additional-options): Use
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-mfp-trap-mode=sui instead of -miee-with-inexact for alpha*-*-*.
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-mfp-trap-mode=sui instead of -mieee-with-inexact for alpha*-*-*.
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* gfortran.dg/ieee/ieee_1.F90 (dg-additional-options): Ditto.
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2014-07-17 Paolo Carlini <paolo.carlini@oracle.com>
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@ -0,0 +1,12 @@
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/* { dg-do compile } */
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/* { dg-options "-mavx512f" } */
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#include <x86intrin.h>
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__m512i zmm;
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__m128i xmm;
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void test (void)
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{
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xmm = _mm512_extracti32x4_epi32 (zmm, 0);
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}
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