xtensa: Add setmemsi insn pattern
This patch introduces setmemsi insn pattern of two kinds, unrolled loop and small loop, for fixed small length and constant initialization value. gcc/ChangeLog: * config/xtensa/xtensa-protos.h (xtensa_expand_block_set_unrolled_loop, xtensa_expand_block_set_small_loop): New prototypes. * config/xtensa/xtensa.cc (xtensa_sizeof_MOVI, xtensa_expand_block_set_unrolled_loop, xtensa_expand_block_set_small_loop): New functions. * config/xtensa/xtensa.md (setmemsi): New expansion pattern. * config/xtensa/xtensa.opt (mlongcalls): Add target mask.
This commit is contained in:
Takayuki 'January June' Suwa
Max Filippov
parent
b2cb88fb45
commit
6454b4a8f5
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@ -41,6 +41,8 @@ extern void xtensa_expand_conditional_branch (rtx *, machine_mode);
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extern int xtensa_expand_conditional_move (rtx *, int);
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extern int xtensa_expand_scc (rtx *, machine_mode);
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extern int xtensa_expand_block_move (rtx *);
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extern int xtensa_expand_block_set_unrolled_loop (rtx *);
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extern int xtensa_expand_block_set_small_loop (rtx *);
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extern void xtensa_split_operand_pair (rtx *, machine_mode);
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extern int xtensa_emit_move_sequence (rtx *, machine_mode);
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extern rtx xtensa_copy_incoming_a7 (rtx);
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@ -1373,6 +1373,217 @@ xtensa_expand_block_move (rtx *operands)
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}
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/* Try to expand a block set operation to a sequence of RTL move
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instructions. If not optimizing, or if the block size is not a
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constant, or if the block is too large, or if the value to
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initialize the block with is not a constant, the expansion
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fails and GCC falls back to calling memset().
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operands[0] is the destination
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operands[1] is the length
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operands[2] is the initialization value
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operands[3] is the alignment */
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static int
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xtensa_sizeof_MOVI (HOST_WIDE_INT imm)
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{
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return (TARGET_DENSITY && IN_RANGE (imm, -32, 95)) ? 2 : 3;
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}
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int
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xtensa_expand_block_set_unrolled_loop (rtx *operands)
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{
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rtx dst_mem = operands[0];
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HOST_WIDE_INT bytes, value, align;
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int expand_len, funccall_len;
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rtx x, reg;
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int offset;
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if (!CONST_INT_P (operands[1]) || !CONST_INT_P (operands[2]))
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return 0;
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bytes = INTVAL (operands[1]);
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if (bytes <= 0)
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return 0;
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value = (int8_t)INTVAL (operands[2]);
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align = INTVAL (operands[3]);
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if (align > MOVE_MAX)
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align = MOVE_MAX;
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/* Insn expansion: holding the init value.
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Either MOV(.N) or L32R w/litpool. */
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if (align == 1)
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expand_len = xtensa_sizeof_MOVI (value);
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else if (value == 0 || value == -1)
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expand_len = TARGET_DENSITY ? 2 : 3;
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else
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expand_len = 3 + 4;
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/* Insn expansion: a series of aligned memory stores.
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Consist of S8I, S16I or S32I(.N). */
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expand_len += (bytes / align) * (TARGET_DENSITY
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&& align == 4 ? 2 : 3);
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/* Insn expansion: the remainder, sub-aligned memory stores.
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A combination of S8I and S16I as needed. */
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expand_len += ((bytes % align + 1) / 2) * 3;
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/* Function call: preparing two arguments. */
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funccall_len = xtensa_sizeof_MOVI (value);
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funccall_len += xtensa_sizeof_MOVI (bytes);
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/* Function call: calling memset(). */
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funccall_len += TARGET_LONGCALLS ? (3 + 4 + 3) : 3;
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/* Apply expansion bonus (2x) if optimizing for speed. */
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if (optimize > 1 && !optimize_size)
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funccall_len *= 2;
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/* Decide whether to expand or not, based on the sum of the length
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of instructions. */
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if (expand_len > funccall_len)
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return 0;
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x = XEXP (dst_mem, 0);
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if (!REG_P (x))
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dst_mem = replace_equiv_address (dst_mem, force_reg (Pmode, x));
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switch (align)
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{
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case 1:
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break;
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case 2:
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value = (int16_t)((uint8_t)value * 0x0101U);
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break;
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case 4:
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value = (int32_t)((uint8_t)value * 0x01010101U);
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break;
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default:
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gcc_unreachable ();
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}
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reg = force_reg (SImode, GEN_INT (value));
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offset = 0;
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do
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{
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int unit_size = MIN (bytes, align);
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machine_mode unit_mode = (unit_size >= 4 ? SImode :
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(unit_size >= 2 ? HImode :
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QImode));
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unit_size = GET_MODE_SIZE (unit_mode);
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emit_move_insn (adjust_address (dst_mem, unit_mode, offset),
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unit_mode == SImode ? reg
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: convert_to_mode (unit_mode, reg, true));
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offset += unit_size;
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bytes -= unit_size;
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}
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while (bytes > 0);
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return 1;
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}
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int
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xtensa_expand_block_set_small_loop (rtx *operands)
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{
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HOST_WIDE_INT bytes, value, align;
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int expand_len, funccall_len;
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rtx x, dst, end, reg;
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machine_mode unit_mode;
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rtx_code_label *label;
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if (!CONST_INT_P (operands[1]) || !CONST_INT_P (operands[2]))
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return 0;
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bytes = INTVAL (operands[1]);
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if (bytes <= 0)
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return 0;
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value = (int8_t)INTVAL (operands[2]);
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align = INTVAL (operands[3]);
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if (align > MOVE_MAX)
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align = MOVE_MAX;
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/* Totally-aligned block only. */
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if (bytes % align != 0)
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return 0;
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/* If 4-byte aligned, small loop substitution is almost optimal, thus
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limited to only offset to the end address for ADDI/ADDMI instruction. */
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if (align == 4
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&& ! (bytes <= 127 || (bytes <= 32512 && bytes % 256 == 0)))
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return 0;
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/* If no 4-byte aligned, loop count should be treated as the constraint. */
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if (align != 4
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&& bytes / align > ((optimize > 1 && !optimize_size) ? 8 : 15))
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return 0;
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/* Insn expansion: holding the init value.
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Either MOV(.N) or L32R w/litpool. */
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if (align == 1)
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expand_len = xtensa_sizeof_MOVI (value);
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else if (value == 0 || value == -1)
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expand_len = TARGET_DENSITY ? 2 : 3;
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else
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expand_len = 3 + 4;
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/* Insn expansion: Either ADDI(.N) or ADDMI for the end address. */
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expand_len += bytes > 127 ? 3
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: (TARGET_DENSITY && bytes <= 15) ? 2 : 3;
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/* Insn expansion: the loop body and branch instruction.
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For store, one of S8I, S16I or S32I(.N).
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For advance, ADDI(.N).
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For branch, BNE. */
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expand_len += (TARGET_DENSITY && align == 4 ? 2 : 3)
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+ (TARGET_DENSITY ? 2 : 3) + 3;
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/* Function call: preparing two arguments. */
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funccall_len = xtensa_sizeof_MOVI (value);
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funccall_len += xtensa_sizeof_MOVI (bytes);
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/* Function call: calling memset(). */
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funccall_len += TARGET_LONGCALLS ? (3 + 4 + 3) : 3;
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/* Apply expansion bonus (2x) if optimizing for speed. */
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if (optimize > 1 && !optimize_size)
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funccall_len *= 2;
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/* Decide whether to expand or not, based on the sum of the length
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of instructions. */
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if (expand_len > funccall_len)
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return 0;
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x = XEXP (operands[0], 0);
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if (!REG_P (x))
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x = XEXP (replace_equiv_address (operands[0], force_reg (Pmode, x)), 0);
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dst = gen_reg_rtx (SImode);
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emit_move_insn (dst, x);
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end = gen_reg_rtx (SImode);
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emit_insn (gen_addsi3 (end, dst, operands[1] /* the length */));
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switch (align)
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{
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case 1:
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unit_mode = QImode;
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break;
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case 2:
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value = (int16_t)((uint8_t)value * 0x0101U);
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unit_mode = HImode;
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break;
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case 4:
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value = (int32_t)((uint8_t)value * 0x01010101U);
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unit_mode = SImode;
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break;
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default:
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gcc_unreachable ();
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}
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reg = force_reg (unit_mode, GEN_INT (value));
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label = gen_label_rtx ();
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emit_label (label);
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emit_move_insn (gen_rtx_MEM (unit_mode, dst), reg);
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emit_insn (gen_addsi3 (dst, dst, GEN_INT (align)));
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emit_cmp_and_jump_insns (dst, end, NE, const0_rtx, SImode, true, label);
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return 1;
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}
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void
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xtensa_expand_nonlocal_goto (rtx *operands)
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{
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@ -1080,6 +1080,22 @@
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DONE;
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})
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;; Block sets
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(define_expand "setmemsi"
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[(match_operand:BLK 0 "memory_operand")
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(match_operand:SI 1 "")
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(match_operand:SI 2 "")
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(match_operand:SI 3 "const_int_operand")]
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"!optimize_debug && optimize"
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{
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if (xtensa_expand_block_set_unrolled_loop (operands))
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DONE;
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if (xtensa_expand_block_set_small_loop (operands))
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DONE;
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FAIL;
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})
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;; Shift instructions.
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@ -27,7 +27,7 @@ Target Mask(FORCE_NO_PIC)
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Disable position-independent code (PIC) for use in OS kernel code.
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mlongcalls
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Target
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Target Mask(LONGCALLS)
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Use indirect CALLXn instructions for large programs.
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mtarget-align
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