OpenE2K
/
gcc
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

200x-xx-xx Nathan Sidwell <nathan@codesourcery.com> Richard Sandiford <richard@codesourcery.com> 

gcc/
200x-xx-xx  Nathan Sidwell  <nathan@codesourcery.com>
	    Richard Sandiford  <richard@codesourcery.com>

	* doc/invoke.texi: Document -mno-bitfield, -mno-rtd and -mno-short.
	* config/m68k/m68k.opt: Resort options.
	(mbitfield, mrtd, mshort): Remove RejectNegative properties.

Co-Authored-By: Richard Sandiford <richard@codesourcery.com>

From-SVN: r120717
This commit is contained in:
Nathan Sidwell 2007-01-12 09:37:15 +00:00 committed by Richard Sandiford
parent 7eb4f04449
commit 648265890d
3 changed files with 28 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
gcc/ChangeLog
View File

@ -1,3 +1,10 @@
2007-01-12 Nathan Sidwell <nathan@codesourcery.com>
Richard Sandiford <richard@codesourcery.com>
* doc/invoke.texi: Document -mno-bitfield, -mno-rtd and -mno-short.
* config/m68k/m68k.opt: Resort options.
(mbitfield, mrtd, mshort): Remove RejectNegative properties.
2007-01-12 Nathan Sidwell <nathan@codesourcery.com> 2007-01-12 Nathan Sidwell <nathan@codesourcery.com>
Richard Sandiford <richard@codesourcery.com> Richard Sandiford <richard@codesourcery.com>

14
gcc/config/m68k/m68k.opt
View File

@ -39,10 +39,6 @@ m5407
Target RejectNegative Target RejectNegative
Generate code for a 5407 Generate code for a 5407
mcfv4e
Target RejectNegative
Generate code for a ColdFire v4e
m68000 m68000
Target RejectNegative Target RejectNegative
Generate code for a 68000 Generate code for a 68000
@ -101,7 +97,7 @@ Target RejectNegative Joined
Specify the name of the target architecture Specify the name of the target architecture
mbitfield mbitfield
Target Report RejectNegative Mask(BITFIELD) Target Report Mask(BITFIELD)
Use the bit-field instructions Use the bit-field instructions
mc68000 mc68000
@ -112,6 +108,10 @@ mc68020
Target RejectNegative Target RejectNegative
Generate code for a 68020 Generate code for a 68020
mcfv4e
Target RejectNegative
Generate code for a ColdFire v4e
mcpu= mcpu=
Target RejectNegative Joined Target RejectNegative Joined
Specify the target CPU Specify the target CPU
@ -149,7 +149,7 @@ Target Report Mask(PCREL)
Generate pc-relative code Generate pc-relative code
mrtd mrtd
Target Report RejectNegative Mask(RTD) Target Report Mask(RTD)
Use different calling convention using 'rtd' Use different calling convention using 'rtd'
msep-data msep-data
@ -161,7 +161,7 @@ Target RejectNegative Joined UInteger
ID of shared library to build ID of shared library to build
mshort mshort
Target Report RejectNegative Mask(SHORT) Target Report Mask(SHORT)
Consider type 'int' to be 16 bits wide Consider type 'int' to be 16 bits wide
msoft-float msoft-float

17
gcc/doc/invoke.texi
View File

@ -583,9 +583,9 @@ Objective-C and Objective-C++ Dialects}.
@gccoptlist{-march=@var{arch} -mcpu=@var{cpu} -mtune=@var{tune} @gccoptlist{-march=@var{arch} -mcpu=@var{cpu} -mtune=@var{tune}
-m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040 @gol -m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040 @gol
-m68060 -mcpu32 -m5200 -m5206e -m528x -m5307 -m5407 @gol -m68060 -mcpu32 -m5200 -m5206e -m528x -m5307 -m5407 @gol
-mcfv4e -mbitfield -mc68000 -mc68020 @gol -mcfv4e -mbitfield -mno-bitfield -mc68000 -mc68020 @gol
-mnobitfield -mrtd -mdiv -mno-div -mshort @gol -mnobitfield -mrtd -mno-rtd -mdiv -mno-div -mshort @gol
-mhard-float -m68881 -msoft-float -mpcrel @gol -mno-short -mhard-float -m68881 -msoft-float -mpcrel @gol
-malign-int -mstrict-align -msep-data -mno-sep-data @gol -malign-int -mstrict-align -msep-data -mno-sep-data @gol
-mshared-library-id=n -mid-shared-library -mno-id-shared-library} -mshared-library-id=n -mid-shared-library -mno-id-shared-library}
@ -10510,8 +10510,14 @@ Consider type @code{int} to be 16 bits wide, like @code{short int}.
Additionally, parameters passed on the stack are also aligned to a Additionally, parameters passed on the stack are also aligned to a
16-bit boundary even on targets whose API mandates promotion to 32-bit. 16-bit boundary even on targets whose API mandates promotion to 32-bit.
@item -mno-short
@opindex -mno-short
Do not consider type @code{int} to be 16 bits wide. This is the default.
@item -mnobitfield @item -mnobitfield
@itemx -mno-bitfield
@opindex mnobitfield @opindex mnobitfield
@opindex mno-bitfield
Do not use the bit-field instructions. The @option{-m68000}, @option{-mcpu32} Do not use the bit-field instructions. The @option{-m68000}, @option{-mcpu32}
and @option{-m5200} options imply @w{@option{-mnobitfield}}. and @option{-m5200} options imply @w{@option{-mnobitfield}}.
@ -10545,6 +10551,11 @@ harmlessly ignored.)
The @code{rtd} instruction is supported by the 68010, 68020, 68030, The @code{rtd} instruction is supported by the 68010, 68020, 68030,
68040, 68060 and CPU32 processors, but not by the 68000 or 5200. 68040, 68060 and CPU32 processors, but not by the 68000 or 5200.
@item -mno-rtd
@opindex mno-rtd
Do not use the calling conventions selected by @option{-mrtd}.
This is the default.
@item -malign-int @item -malign-int
@itemx -mno-align-int @itemx -mno-align-int
@opindex malign-int @opindex malign-int