diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 123ec276011..180ff010071 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2002-03-23 Richard Earnshaw + + PR java/5489 + * arm.md (return, sibcall_epilogue): Pass const_true_rtx as the + operand argument to output_return_instruction. + * arm.c (arm_print_operand, case 'd'): If the operand is + const_true_rtx then just return. + (arm_print_operand, case 'D'): If the operand is const_true_rtx + then abort. + 2002-03-23 Andrew Cagney * doc/invoke.texi (Option Summary): Mention -Wswitch-default. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 814c84d9888..53633dcbdff 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -8568,7 +8568,8 @@ arm_print_operand (stream, x, code) return; case 'd': - if (!x) + /* CONST_TRUE_RTX means always -- that's the default. */ + if (x == const_true_rtx) return; if (TARGET_ARM) @@ -8579,8 +8580,10 @@ arm_print_operand (stream, x, code) return; case 'D': - if (!x) - return; + /* CONST_TRUE_RTX means not always -- ie never. We shouldn't ever + want to do that. */ + if (x == const_true_rtx) + abort (); if (TARGET_ARM) fputs (arm_condition_codes[ARM_INVERSE_CONDITION_CODE diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 9ea7d0c8a06..7d73cbd3b9a 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -6721,7 +6721,7 @@ arm_ccfsm_state += 2; return \"\"; } - return output_return_instruction (NULL, TRUE, FALSE); + return output_return_instruction (const_true_rtx, TRUE, FALSE); }" [(set_attr "type" "load") (set_attr "predicable" "yes")] @@ -8756,7 +8756,7 @@ "* output_asm_insn (\"%@ Sibcall epilogue\", operands); if (USE_RETURN_INSN (FALSE)) - return output_return_instruction (NULL, FALSE, FALSE); + return output_return_instruction (const_true_rtx, FALSE, FALSE); return arm_output_epilogue (FALSE); " ;; Length is absolute worst case